I am attempting to use phase tolerance to control some relative length rules within a differential pair. The topology is essentially 3 components which I will call A, B and C. The signal goes from a pin on comp A to one on comp B and continues on from B to a pin on comp C.
I would like to set phase tolerance to say 5mils and see the property on pin pairs from A-B and A-C though I could live with B-C being created as well.
The issue that I am having with this is that Allegro configures the pin pairs associated with a given net/diff pair based upon the PINUSE property (and apparently the part CLASS, though I haven't seen this affect anything in my situation.) The pins in question are functionally bi-directional, yet I don't get the pin pairs I would expect if I set the PINUSE property of the associated pins on A, B and C to "BI". Perhaps I'm not thinking about this correctly, but in my mind a bi-directional pin is one that can either drive or receive a signal. As such, I would expect to see 3 pin pairs created when all components are set as mentioned (pinuse = "BI"); A.pin:B.pin; A.pin:C.pin; B.pin:C.pin. Instead, Allegro will only create a pin pair based upon the longest length (A.pin:C.pin).
I decided to research this a bit further and found information essentially saying that there has to be an explicit definition of driver and receiver, otherwise the longest path will be chosen. To further complicate matters I tried the following configuration: A = TRI B = BI C = BI
This yielded the 3 aforementioned pin pairs I would've expected to see on a BI, BI, BI configuration. What is confusing here is that a pin pair is created between components B and C which again, were both set to BI... yet in the previous configuration (BI, BI, BI) Allegro defaulted to the longest path method of pin pair creation.
I can work around this issue by using the following: A = OUT B = IN C = IN. This works fine for my purposes as I will get A.pin:B.pin; A.pin:C.pin as I originally wanted, but it is functionally incorrect in terms of PINUSE which could adversely affect other disciplines interacting with the topology.
To summarize, I would like to know if there is a way to set this up in such a way that I can access the desired pin pairs while maintaining accurate PINUSE properties.