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 swapping cells with HVT or LVT cells 

Last post Mon, Jun 27 2011 7:00 AM by Kari. 6 replies.
Started by spach 03 Feb 2009 04:14 AM. Topic has 6 replies and 4848 views
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  • Tue, Feb 3 2009 4:14 AM

    • spach
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    swapping cells with HVT or LVT cells Reply

    can any explain the flow in encounter to swap the cell with hvt or lvt cells?

    design is time closed, to reduce the leakage power i need to swap the cells with hvt cell so that i should not get any timing violatios

    if there are any violations i can swap with lvt cells to aviod violations

    please explain me the flow in encounter to achieve that

    regards

    suresh 

     

    suresh pachha
    • Post Points: 20
  • Tue, Feb 3 2009 7:15 AM

    • BobD
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    Re: swapping cells with HVT or LVT cells Reply

    The recommended way of optimizing leakage power concurrently with timing during the flow is as follows:

    setOptMode -leakagePowerEffort {-none | -low | -high}
    optDesign {-preCTS | -postCTS | -postRoute}

    However, if you've got a design that meets timing postRoute and you'd like to optimize just leakage power without disrupting timing:

    optLeakagePower -postRoute

    -or-

    setOptMode -leakagePowerEffort {-low | -high} -allowOnlyCellSwapping true
    optDesign -postRoute

    Hope this helps, Bob

    • Post Points: 20
  • Wed, Feb 4 2009 4:30 AM

    • RahulRc
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    Re: swapping cells with HVT or LVT cells Reply

    Hi BobD,

     can we constrain encounter such that it will use  certain % of LVT cells?

    Thanks,

    Rahul

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  • Wed, Feb 4 2009 6:23 AM

    • BobD
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    Re: swapping cells with HVT or LVT cells Reply

    Not that I'm aware of.  I believe the algorithm seeks to use as many HVT as possible while maintaining timing.  The level of aggressiveness can be controlled with setOptMode -leakagePowerEffort {low | high}.

    Is there a design rule or guideline that you're seeking to satisfy by controlling the percentage of LVT used?

    • Post Points: 5
  • Wed, Feb 4 2009 7:14 AM

    • grasshopper
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    Re: swapping cells with HVT or LVT cells Reply

     Rahul,

     I would be curious to find out why you want to constrain the %LVT cells? There is no reason the tools and most respectable optmization engines should stop reclaiming power if it does not penalize your other design goals. This is a common practice that was used and it generally yields suboptimal results. The issue is that the end-goal of the user is a given power target and whether tool achieves the desired goal using fancy optmizations or any % of any VT cells is "generally" inconsequential. Some design flows and ASIC vendors have predicated such guidelines as rules of thumb but ultimately if your target power is 1W that is all your driving towards. Modern Low Power optimization techniques have made it such that there are many techniques beyond multiVT to address low power issues as well. I highly recommned the low power guide published by Si2 (specially since it is free ;) ). IBM has also published papers at CDNLive and at SNUG highlighting flow trade-offs / options when using multiple VT libraries. In a Cadence flow, the recommendation is to use concurrent multi-VT optimization in RTL Compiler during synthesis and the options described by BobD in Encounter during the P&R portion of the flow

     

    hope this helps,

    gh-

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  • Mon, Mar 14 2011 2:18 AM

    • DavidBD
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    Re: swapping cells with HVT or LVT cells Reply

     Hello,

    Can you provide a flow to run SVT -> HVT swapping when routing is freeze and only swap is enabled ?

     David

     

    • Post Points: 20
  • Mon, Jun 27 2011 7:00 AM

    • Kari
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    Re: swapping cells with HVT or LVT cells Reply

     Did you try the optLeakagePower flows already mentioned in this thread?

    • Post Points: 5
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Started by spach at 03 Feb 2009 04:14 AM. Topic has 6 replies.