OVM Metric Driven Verification With an FPGA-based Design

OVM Metric Driven Verification With an FPGA-based Designhttp://www.cadence.com/Community/blogs/sd/archive/2009/06/17/metric-driven-verification-with-an-fpga-based-design.aspxDuring the last 2 years I have enjoyed the opportunity to work with the Incisive Software Extensions (ISX) with many customers. I learned a lot about software/hardware co-verification and we reached the point were we started to see beyond one’senCommunityServer 2007.1 (Build: 20917.1142)More Details on Post Silicon Embedded Software Verification With ISXhttp://www.cadence.com/Community/blogs/sd/archive/2009/06/17/metric-driven-verification-with-an-fpga-based-design.aspx#20216Tue, 18 Aug 2009 15:46:05 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:20216System Design and Verification<p>Please welcome back Joerg Simon and Markus Winterholer, both from the ISX team in Germany, to the TeamESL</p> <img src="http://www.cadence.com/Community/aggbug.aspx?PostID=20216" width="1" height="1">