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Why C-to-Silicon Compiler HLS has Supported IEEE 1666-2011 SystemC All Along

Comments(0)Filed under: Incisive, C-to-Silicon Compiler, SystemC, QoR, IEEE 1666-2011, asynchronous reset

Recently one of our competitors issued a press release claiming to be the first high-level synthesis (HLS) vendor to support IEEE 1666TM-2011 SystemC. Specifically mentioned was newly-added support for asynchronous resets in SC_THREADs. Congratulations to them on supporting this standard.

You are probably wondering "when will Cadence C-to-Silicon Compiler HLS support IEEE 1666-2011 SystemC?"

Most of our existing customers already know the answer - it already does.

The IEEE 1666-2011 spec has a publication date of 9 January 2012. At the time of its publication, C-to-Silicon Compiler already supported the synthesizable constructs in the spec. Specifically, the asynchronous reset in SC_THREADs construct was donated by Cadence to the spec after we added support for it in C-to-Silicon Compiler to meet the needs of multiple customers.

Cadence is committed to supporting and advancing industry standards in this area. Standard languages such as SystemC enable full design and verification solutions to be built by our customers using vendor solutions that best meet their quality of results, design analysis, and turnaround time needs. This is why our Incisive simulation products support the full IEEE 1666-2011 specification and why C-to-Silicon Compiler high-level synthesis supports the synthesizable constructs in the IEEE 1666-2011 spec. And it is why we actively participate in the standards working groups and donate the new constructs we develop in response to our customers' needs.

We do not consider this to be news to release to the press, we consider it to be table stakes to compete based on the merits of the design, verification, and implementation solution.

Hopefully this clears up any confusion. Now let's get back to designing and verifying cool new hardware with SystemC!

-Jack Erickson

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