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Quiet Before The Storm? And What to Expect at DVCon 2010

Comments(0)Filed under: System Design and Verification, ESL, SystemC, DVCon

In the last couple weeks Mentor did an about-face and decided to embrace SystemC (I told you that would happen!), and then Synopsys threw down the gauntlet and decided to buy two Virtual Protoyping companies.  Supposedly, the word on the street is they are preparing to buy a high-level synthesis company before the year is out.  Is all that cash they brag about burning a hole in their pocket?  Hardly.  They've come to realize, as we and Mentor did years ago, that the biggest part of EDA's future is in ESL.

In the meantime, the energy-level in Cadence these past couple months has been off the charts. Many of us in Cadence saw this coming back in the fall and are still running around like chickens with the head cut off, and to say Cadence execs have been "taking aggressive action" would be a big understatement.  Obviously I can't give details, but let me just say that starting in a couple months, people will start to see a very different company.

DVCon, which starts February 22nd in San Jose, is just the "warm-up".  Of course we're having a booth, and our CEO is giving the keynote...but of even more interest for those you who like to get your hands dirty:

  1. We have a fairly technical article coming out (co-authored with our arch-rival Forte, so you'll know it's honest!) about how and why SystemC/TLM driven design and verification will deliver on the "ESL promises" eluding us for decades.  
  2. We have an OSCI sponsored tutorial on SystemC TLM and HLS, delivered by three of the world's top SystemC experts.  
  3. A presentation at the North America SystemC User Group meeting by well-know EDA consultant Brian Bailey, on TLM design and verification methodology development he's been doing with Cadence technologists.
  4. A tutorial on advanced OVM topics, including how the standard may eventually be extended to support TLM verification and ES.
  5. And finally, a panel debate with Cadence, Synopsys, Mentor and Jasper on the best approaches for minimizing cost, time and effort associated with verification.

And that's just for DVCon...there's a lot more to come!

Steve Svoboda

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