Home > Community > Blogs > System Design and Verification > metric driven verification with an fpga based design
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the System Design and Verification blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

OVM Metric Driven Verification With an FPGA-based Design

Comments(1)Filed under: System simulation and analysis, System Design and Verification, Hardware/software co-verification, Incisive, OVM, ISX, FPGA

During the last 2 years I have enjoyed the opportunity to work with the Incisive Software Extensions (ISX) with many customers. I learned a lot about software/hardware co-verification and we reached the point were we started to see beyond one’s own nose.

One of the substantial concepts of ISX is the generic software adapter. The accentuation here is the attribute 'generic'. The generic approach guaranties the freedom to connect almost everything that somehow drives embedded software. From this point of view it's very easy to build up a library of supported devices and reuse proven and customized adapters out of the box for convenience.

Is the generic concept a really proven one, mature enough to document a step by step approach? What are potential areas of using the ISX technology with the metric driven verification methodology apart from the simulation based mainstream?

The ISX installation explains, with the help of examples, the connection to the OpenRisc processor ork1 (http://www.opencores.org/openrisc) driven in a simulation environment, and the integration of Palladium and Xtreme boxes. There is an open question remaining: what is the effort and benefit to connect it to an arbitrary FPGA prototype board? This question comes up during our engagements with customers, and we looked for a chance to find a practical answer to it instead of the theoretical explanations we used so far.

In 2008 we embarked upon an ISX activity together with ElCamino (http://www.elcamino.de), a consulting company and partner of Cadence for many years. During our discussions we selected a ElCaminos FPGA training board and integrated it into a metric driven verification environment using ISX. The hardware was a low-cost, low-power Cyclone III FPGA from Altera combined with a LCD color touch panel for visualization driven by Specman testbench. The result was a small eyecatcher we introduced first time on CDNlive! in Munich this year.

 

altera_fpga_demo

Figure 1 - Altera FPGA Board

 

The demo vehicle proves that the generic adapter concept provides significant flexibility, and is a solid base to extend ISX into embedded software verification strategy.The integration effort for the selected board was not higher than the standard ISX simulation based project and no additional functionality needed to be added to the ISX tool itself to make this happen. The benefit of such an integration is the post silicon verification with existing fundamental verification methodology and the expected high reuse factor of any existing metric driven verification environment (MDV).

And finally the generic FPGA board support of ISX enables the introduction of MDV to the software verification world, which is revolutionary thinking from the software testing perspective.

More background information about this engagement will be provided in an upcoming blog interview with the ElCamino engineers, Ernst Zwingenberge and Malte Henzelmann, who supervised both the project at ElCamino.

This TeamESL posting was provided by Joerg Simon who is a CoreComp Verification Engineer at Cadence Design Systems where he is responsible for ESL product deployment, including hardware/software co-verifciation products and TLM methodology.

Comments(1)

By shamima sultana on January 16, 2010
Great post

Leave a Comment


Name
E-mail (will not be published)
Comment
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.