Home > Community > Blogs > System Design and Verification > emulation vs fpga prototyping
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the System Design and Verification blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Emulation vs. FPGA Prototyping

Comments(3)Filed under: System Design and Verification, Palladium, RTL, ASIC, Prototyping, FPGA

There is a continuous debate about FPGA prototyping vs. emulation. This debate is heating-up with the latest Synopsys acquisitions of FPGA prototyping tools: Synplicity and Chip-It. This debate sometimes reminds me the endless debate between ASIC and FPGA companies. The reality is that there is a market for both. The FPGA prototyping segment addresses mostly validation of smaller designs or a single IP while emulation is being used for large SoC designs. The FPGA prototyping being used mostly for SW development while emulation is being used for HW/SW verification and full system validation. In the last 10 years, Cadence made emulation very easy-to-use with bring-up and turnaround times reaching simulation environment bring-up (and in some cases, becoming even better). Don't be foolish and look only at the initial cost in order to make your decision. Take in consideration, the resources, ease-of-use, time-to-market, risk mitigation and all the parameters being considered for any engineering project. Our customers continue to use emulation with the highest-level of satisfaction in the market and many new customers starting to use emulation every year as a result of the following parameters:

1. Fast bring-up time

2. Fast compile times (from RTL to run-time)

3. Superior debug

4. Rich SpeedBridge portfolio

5. Low cost of ownership

6. Scalability with high capacity and multi-user capability

7. Ease-of-use


 See below some of the recent testimonials from our customers who have chosen emulation vs. FPGA prototyping:

1. In the press release below, Hiroshi Kubo, division deputy general manager of the System Device Division at Sharp said:

"The Palladium system enabled our new methodology while making it easier and faster to build a verification environment than with our traditional system validation with breadboards, which we mainly used in the past.


2. Novafora, a startup company working on a video processor with several millions gates, is able to bring up their design on Palladium and discover significant architecture bugs before even committing to silicon, doing it in two to three weeks with Palladium, what would take two to three months with FPGA prototyping.

 If you have comments, I will love to get your feedback.



By Sudsara on November 22, 2009

I read this article of yours as well:


Is there a comparison (wrt cost) of FPGA-prototype vs. say Palladium for an average sized SOC validation.

Also, is it possible to highlight some critical differences / advantages of Palladium vs others found in the market(not mentioning the company name here!).



p.s. I work on verification with emulation and hence the questions!

By Pilar Umnuss on July 25, 2011
Does cadence support emulation of a multiple FPGA chip design? i.e. Virtex (1-4 types)
Also there tool(s)  that support algorithm (inittially developed in MATLAB, later coded in VHDL) partitioning into multiple FPGAs?
Thank you,

By brb on May 4, 2012
what is the difference between asic prototype & fpga protoyepe.  

Leave a Comment

E-mail (will not be published)
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.