Home > Community > Blogs > System Design and Verification > system level design and verification the next new wave
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the System Design and Verification blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

System-level design and verification - at the center!

Comments(0)Filed under: System simulation and analysis, System Design and Verification, Acceleration, Emulation, Hardware/software co-verification, ESL handoff, ISX, CDNLive! Silicon Valley 2008, Coverage Driven Verification for Embedded Software, ESL, embedded SW engineer, architect, embedded software

This year, Cadence increases its focus on system-level design and verification events. During the latest CDNLive San-Jose that was held in September, the guest keynoteCDNLive Guest Speaker - Dr. Jan Rabaey, Distinguished Professor of Electrical Engineering at the University of California, Berkeley, described the challenges and opportunities facing customers and partners in the years ahead.

System-level design was the center of his talk. According to Dr. Rabaey: "The moment for true system-level design is finally here".

In his presentation, Dr. Rabaey quoted Alberto Sangiovanni-Vincentelli, co-founder and chief technology advisor at Cadence by saying: "Recognition of the common requirements for co-design of hardware and software will create new solutions that eventually will lead into productivity gains, lower cost and first-path design success."

Dr Rabaey added: "The semiconductor and the design automation industries focused in the past on "component design". They need to address the system space in a hollistic way by addressing the following challenges:

A. Complexity and emerging behavior of networked systems
B. System-level matrix-driven design and verification
C. System-level reliability

The complexity issue can be solved by:

A. Raising the abstraction-model
B. Enabling a "virtual engineering" design methodology
C. A system-level design science development

"Finally," said Rabaey. "If you ignore system-level design, you're toast."

Many good presentations were delivered by customers in the system-level space at CDNLive San-Jose. If you missed the event, do not worry; Many of these presentations will be published at the community Web site. You also have the opportunity to hear about Cadence system-level solutions during the up-coming events.

ARM Development Conference - Oct 7th through Oct 9th at the Santa Clara Convention Center:

1. Visit Cadence at Booth # 519 & 616
2. Come to hear about a new ARM/CDNS Hardware/Software Co-verification environment on Tuesday, Oct. 7th at 12:30 p.m. at the Santa Clara Convention Center, Connected Community Theater.

Rapid System-Verification Techtorials:

The up-coming system-verification techtorial will provide you info about Cadence system-level solutions with the following highlights:

  • Transaction-level modeling
  • Transaction-based acceleration
  • SystemC simulation
  • In-circuit emulation
  • Acceleration of constrained-random coverage-driven verification
  • HW/SW co-verification
  • Metric-driven methodology/Verification planning and management

Sign-up for to these techtorials here.


Leave a Comment

E-mail (will not be published)
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.