System Realization Alliance -- An Industry Collaboration
By Steven Brown
on July 21, 2010
System Realization is a very broad topic. It encompasses all aspects of system design, from chips to chassis. In particular, innovations in software are driving changes in the value chain, as highlighted in the EDA360 industry vision document . In order...
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Filed under: verification, ESL, TLM, hls, EDA360, System Realization
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Software Development Tool Teardown For The Motorola Droid
By Jason Andrews
on July 19, 2010
Lately, device teardowns of consumer electronics have become popular. There are many articles and videos showing what's inside a particular device. EE Times even had an article asking if they were useful and who actually benefits from them (but after...
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Filed under: android, Monkey, JTAG, ADB, DDMS, QXDM, GDB, VNC, Systemm Verification, QPST, ETM
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Changing the Status Quo in SoC to System Hand-off
By Jason Andrews
on July 13, 2010
As part of EDA360 Cadence is learning how to play a more significant role in the SoC-to-System handoff. To date, Cadence has served the SoC market by enabling companies to design and verify faster, bigger, and better SoC devices that get used by their...
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Filed under: virtual platforms, Droid, Device Drivers
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What's The Best Way To Reduce SoC Development Costs?
By Jason Andrews
on June 16, 2010
Before I got started with my DAC 2010 customer meetings on Monday morning, I stopped by the DAC Pavilion to hear what Gary Smith had to say in his " Trends and What's Hot at DAC " session. I was very pleased to hear Gary say that Virtual...
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Filed under: SystemC, virtual platforms, DAC 2010, TLM2, virtual prototypes
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Cadence Contributes ESL Methodology To TSMC Reference Flow 11
By Steven Brown
on June 11, 2010
The EDA360 industry vision document shows how growing complexity and application-driven development are requiring orders-of-magnitude improvements in design productivity. With its new Reference Flow 11 , TSMC has taken an important step towards a standard...
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Filed under: verification, ESL, ECO, system, TSMC, OIP, C to Silicon
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Accelerating Metric-Driven Verification With “Hotswap” on Verification Computing Platform
By Raj Mathur
on June 9, 2010
For a while now, Cadence has been providing leading verification solutions and methodologies such as metric driven verification (MDV). MDV guides verification projects from initial planning to verification closure. Engineers need automated verification...
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Filed under: Acceleration, Emulation, Palladium, DAC, metric-driven verification, emulator, metric, hotswap, MDV, hot swap
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System Development – What To See At DAC 2010
By Ran Avinun
on June 7, 2010
The EDA360 vision paper specifies key System Realization challenges. Embedded software development and verification are rapidly becoming the key increasing cost factors for the electronics industry. Integration and re-use are becoming critical for the...
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Filed under: ARM, wind river, SystemC, DAC, osci, hls, Calypto, ITRI, TSMC, Cadence, Gary Smith, System Realization, DAC 2010, Imperas
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Making an EDA360 System Realization Investment Through Standards Support
By Steven Brown
on June 3, 2010
Cadence is a sponsor of the Open SystemC Initiative (OSCI) standards organization. We are providing finanical and leadership resources to facilitate the creation and promotion of standards for system development. We continue to invest in OSCI and its...
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Filed under: ESL, TLM, osci, C-to-Silcon
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C-to-Silicon Compiler 10.1 - Ease Of Use And RTL QoR
By Steven Brown
on June 2, 2010
In the continuing effort to make high-level synthesis more viable to mainstream RTL designers, Cadence has released version 10.1 of the Cadence C-to-Silicon Compiler (CtoS). This new release continues the recent trend towards overall ease-of-use and Quality...
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Filed under: C-to-Silicon, TLM, CTOS, synthesis, hls
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TLM 2.0 As Part Of The EDA360 Vision
By Ran Avinun
on May 28, 2010
Ann Steffora Mutschler recently covered in her blog the progress the industry has made with OSCI transaction-level modeling (TLM 2.0) and the requirements moving forward. Per my quote in the blog, Cadence is a big advocate of standards-based designs and...
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Filed under: virtual platform, SystemC, TLM, virtual prototype, TLM 2.0, synthesis, System Design and Verification, EDA360
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