http://www.cadence.com/Community/blogs/rf/archive/2009/06/30/periodic-steady-state-analysis-for-dc-to-dc-converters.aspxIn &quot; Spectre RF by any other name ...&quot;, a non-RF application for Spectre RF&#39;s periodic steady-state analysis was introduced. An example of using periodic steady-state analysis [PSS] to simulate the dynamic performance: THD and SFDR, of aenCommunityServer 2007.1 (Build: 20917.1142)http://www.cadence.com/Community/blogs/rf/archive/2009/06/30/periodic-steady-state-analysis-for-dc-to-dc-converters.aspx#20340Mon, 24 Aug 2009 09:28:45 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:20340Frank Wiedmann<p>You could try to do a frequency sweep relative to the first harmonic. However, this does not seem to be possible for PSTB, at least not via ADE. You can still try a PAC simulation instead. Because your break point has a low output impedance and high input impedance, you can put a PAC source in series and calculate the loop gain as the (negative) ratio of the PAC amplitudes on both sides.</p> <img src="http://www.cadence.com/Community/aggbug.aspx?PostID=20340" width="1" height="1">http://www.cadence.com/Community/blogs/rf/archive/2009/06/30/periodic-steady-state-analysis-for-dc-to-dc-converters.aspx#19636Wed, 29 Jul 2009 12:44:09 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:19636Anonymous<p>I have a current mode DC-DC converter which has two feedback loops. The only place a iprobe can be placed which breaks both loops is essentially between the comparator and pass transistor, however PSS/PSTB doesn&#39;t seem to handle breaking the loop at a purely digital spot. Is there a way around this?</p> <img src="http://www.cadence.com/Community/aggbug.aspx?PostID=19636" width="1" height="1">