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<?xml-stylesheet type="text/xsl" href="http://www.cadence.com/Community/utility/FeedStylesheets/atom.xsl" media="screen"?><feed xmlns="http://www.w3.org/2005/Atom" xml:lang="en"><title type="html">RF Design</title><subtitle type="html" /><id>http://www.cadence.com/Community/blogs/rf/atom.aspx</id><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/default.aspx" /><link rel="self" type="application/atom+xml" href="http://www.cadence.com/Community/blogs/rf/atom.aspx" /><generator uri="http://communityserver.org" version="3.1.20917.1142">Community Server</generator><updated>2008-07-11T08:57:00Z</updated><entry><title>SpectreRF AppNotes and Tutorials....Still One of our Best Kept Secrets!</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2012/01/16/spectrerf-appnotes-and-tutorials-still-one-of-our-best-kept-secrets.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2012/01/16/spectrerf-appnotes-and-tutorials-still-one-of-our-best-kept-secrets.aspx</id><published>2012-01-16T23:25:00Z</published><updated>2012-01-16T23:25:00Z</updated><content type="html">Some of you may remember the blog written several years ago &amp;quot; Shhhhh...SpectreRF Tutorials and AppNotes - One of Our Best Kept Secrets &amp;quot;. Well, the more things change...the more things stay the same! The location of these tutorials and appNotes still seems to be one of our best kept secrets! So, I am disclosing (once again) the location of our SpectreRF Tutorials, Appnotes, and Workshops hidden in the MMSIM 11.1 hierarchy.... If you &amp;#39;cd&amp;#39; to your &amp;lt;MMSIM11.1&amp;gt;/tools/spectre/examples...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2012/01/16/spectrerf-appnotes-and-tutorials-still-one-of-our-best-kept-secrets.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1306704" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="VCO" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/VCO/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="Virtuoso" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso/default.aspx" /><category term="PSS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PSS/default.aspx" /><category term="shooting newton" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/shooting+newton/default.aspx" /><category term="RF Measurement library" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Measurement+library/default.aspx" /><category term="QPSS Analysis" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/QPSS+Analysis/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="ADE" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ADE/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="RF spectre spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+spectre+spectreRF/default.aspx" /><category term="APS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/APS/default.aspx" /><category term="envelope" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/envelope/default.aspx" /><category term="fast envelope" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/fast+envelope/default.aspx" /><category term="mixer" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/mixer/default.aspx" /><category term="Oscillator" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Oscillator/default.aspx" /><category term="phase noise" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/phase+noise/default.aspx" /><category term="analog" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog/default.aspx" /><category term="HB" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/HB/default.aspx" /><category term="analog/RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog_2F00_RF/default.aspx" /><category term="PNoise" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PNoise/default.aspx" /><category term="HBnoise" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/HBnoise/default.aspx" /><category term="SpectreRF tutorials" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/SpectreRF+tutorials/default.aspx" /><category term="Spectre AppNotes" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+AppNotes/default.aspx" /></entry><entry><title>Nport Application Note has been Updated and Re-Released</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2012/01/03/nport-application-note-has-been-updated-and-re-released.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2012/01/03/nport-application-note-has-been-updated-and-re-released.aspx</id><published>2012-01-03T14:00:00Z</published><updated>2012-01-03T14:00:00Z</updated><content type="html">Happy New Year! After many requests, I set aside some time and updated the Using the nport in Spectre and SpectreRF Simulations appNote for MMSIM 11.1. You may download the appNote on Cadence Online Support . More nport enhancements are planned, so stay tuned! If you have any comments or questions, please feel free to contact me via Cadence Online Support by logging a Service Request. Best regards, Tawna Wilsey...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2012/01/03/nport-application-note-has-been-updated-and-re-released.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1306677" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="RF Block Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Block+Simulation/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="APS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/APS/default.aspx" /><category term="spectre spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectre+spectreRF/default.aspx" /><category term="nport" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/nport/default.aspx" /><category term="nport settings" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/nport+settings/default.aspx" /><category term="analog" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog/default.aspx" /><category term="HB" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/HB/default.aspx" /><category term="analog/RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog_2F00_RF/default.aspx" /></entry><entry><title>Guidelines for Maximizing Speed vs Accuracy for Harmonic Balance - Part 2</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2011/11/01/guidelines-for-maximizing-speed-vs-accuracy-for-harmonic-balance-part-2.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2011/11/01/guidelines-for-maximizing-speed-vs-accuracy-for-harmonic-balance-part-2.aspx</id><published>2011-11-01T23:00:00Z</published><updated>2011-11-01T23:00:00Z</updated><content type="html">I am often asked for guidelines on maximizing speed vs. accuracy for SpectreRF harmonic balance simulations . Today, I&amp;#39;ll discuss part 2 of the 3 part series consisting of: Which Engine: Spectre or APS? Oversample vs Number of Harmonics Harmonic Trimming The first post in this series focused on the &amp;quot;which engine&amp;quot; question. Another aspect of speed vs accuracy in Harmonic Balance Simulations is specifying the number of harmonics and the value of oversample. Note: You may also want to...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2011/11/01/guidelines-for-maximizing-speed-vs-accuracy-for-harmonic-balance-part-2.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1301408" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="ADE-L" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ADE-L/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="RF spectre spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+spectre+spectreRF/default.aspx" /><category term="HB" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/HB/default.aspx" /><category term="analog/RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog_2F00_RF/default.aspx" /></entry><entry><title>Guidelines for Maximizing Speed vs Accuracy for Harmonic Balance - Part 1</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2011/10/07/guidelines-for-maximizing-speed-vs-accuracy-for-harmonic-balance-part-1.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2011/10/07/guidelines-for-maximizing-speed-vs-accuracy-for-harmonic-balance-part-1.aspx</id><published>2011-10-07T19:00:00Z</published><updated>2011-10-07T19:00:00Z</updated><content type="html">Greetings, I am often asked for guidelines on maximizing speed vs. accuracy for SpectreRF harmonic balance simulations. In a series of 3 blogs, I&amp;#39;ll discuss some of the &amp;quot;knobs&amp;quot; that you can tweak, those being: * Which Engine: Spectre or APS? * Oversample vs Number of Harmonics * Harmonic Trimming Today, I&amp;#39;ll discuss Knob 1. Choosing the appropriate engine....Spectre or APS? The choice between Spectre vs APS boils down to the size of the circuit you are simulating (and the number...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2011/10/07/guidelines-for-maximizing-speed-vs-accuracy-for-harmonic-balance-part-1.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1301407" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="Analog Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Analog+Simulation/default.aspx" /><category term="ADE" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ADE/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="APS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/APS/default.aspx" /><category term="HB" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/HB/default.aspx" /><category term="analog/RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog_2F00_RF/default.aspx" /></entry><entry><title>Measuring Fmax for MOS Transistors</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2011/08/11/measuring-fmax-for-mos-transistors.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2011/08/11/measuring-fmax-for-mos-transistors.aspx</id><published>2011-08-11T15:00:00Z</published><updated>2011-08-11T15:00:00Z</updated><content type="html">The following question has come up in comments: &amp;quot;How do I measure F max for an MOS transistor?&amp;quot; The measurement methodology -- testbench, analysis, calculator setup, stimulus, etc.-- does not change whether you are measuring bipolar transistors or MOS transistors. On the other hand, the results for MOS transistors often come out looking wrong, or more correctly, non-physical. Before scratching your head, adjusting your testbench or doing anything else, you need to consider the model that...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2011/08/11/measuring-fmax-for-mos-transistors.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1292802" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="bipolar transistor" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/bipolar+transistor/default.aspx" /><category term="RFIC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RFIC/default.aspx" /><category term="Virtuoso" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso/default.aspx" /><category term="Circuit simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+simulation/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/simulation/default.aspx" /><category term="analog/RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog_2F00_RF/default.aspx" /><category term="MOS transistors" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MOS+transistors/default.aspx" /><category term="fmax testbench" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/fmax+testbench/default.aspx" /><category term="measuring Fmax" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/measuring+Fmax/default.aspx" /><category term="bsim3v3" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/bsim3v3/default.aspx" /><category term="Fmax" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Fmax/default.aspx" /></entry><entry><title>Guidelines for Setting Pnoise/HBnoise Sidebands to Get Accurate Results</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2011/08/05/guidelines-for-setting-pnoise-hbnoise-sidebands-to-get-accurate-results.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2011/08/05/guidelines-for-setting-pnoise-hbnoise-sidebands-to-get-accurate-results.aspx</id><published>2011-08-05T22:00:00Z</published><updated>2011-08-05T22:00:00Z</updated><content type="html">I get quite a few questions from designers along the lines of &amp;quot;How do I set the number of pss/hb harmonics and pnoise/hbnoise sidebands in order to get accurate results?&amp;quot; Here are some general guidelines that I follow: The number of sidebands ( harmonics ) in the simulation can affect performance. When using pnoise/hbnoise , the upper frequency to be considered for noise folding is set by the Maximum sideband term. The number of Sidebands that you specify corresponds to the set of periodic...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2011/08/05/guidelines-for-setting-pnoise-hbnoise-sidebands-to-get-accurate-results.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1292710" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="PSS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PSS/default.aspx" /><category term="shooting newton" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/shooting+newton/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="RF spectre spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+spectre+spectreRF/default.aspx" /><category term="HB" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/HB/default.aspx" /><category term="analog/RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog_2F00_RF/default.aspx" /><category term="PNoise" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PNoise/default.aspx" /><category term="HBnoise" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/HBnoise/default.aspx" /></entry><entry><title>Q&amp;A: TI Wireless Team Describes Advanced Phase-Noise Characterization for RF Oscillators Using SpectreRF</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2011/06/15/q-amp-a-ti-wireless-team-describes-advanced-phase-noise-characterization-for-rf-oscillators-using-spectrerf.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2011/06/15/q-amp-a-ti-wireless-team-describes-advanced-phase-noise-characterization-for-rf-oscillators-using-spectrerf.aspx</id><published>2011-06-15T19:00:00Z</published><updated>2011-06-15T19:00:00Z</updated><content type="html">In this interview, members of the Texas Instrument wireless group talk about the characterization effort initiated and completed last year between Cadence and IBM using TI RF designs as a pilot. The goal between the two teams was to optimize SpectreRF usage to successfully and efficiently simulate TI RF oscillator designs. This tight collaboration resulted in a publication at DesignCon conference (1). This characterization was successfully implemented in MMSIM 7.2 and above. The people involved in...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2011/06/15/q-amp-a-ti-wireless-team-describes-advanced-phase-noise-characterization-for-rf-oscillators-using-spectrerf.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1277918" width="1" height="1"&gt;</content><author><name>helenet</name><uri>http://www.cadence.com/Community/members/helenet.aspx</uri></author><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="VCO" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/VCO/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="PSS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PSS/default.aspx" /><category term="Circuit simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+simulation/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="APS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/APS/default.aspx" /><category term="Oscillator" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Oscillator/default.aspx" /><category term="phase noise" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/phase+noise/default.aspx" /><category term="analog" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog/default.aspx" /><category term="Nand Jha" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Nand+Jha/default.aspx" /><category term="HB" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/HB/default.aspx" /><category term="TI" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/TI/default.aspx" /><category term="analog/RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analog_2F00_RF/default.aspx" /><category term="PNoise" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PNoise/default.aspx" /><category term="characterization" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/characterization/default.aspx" /><category term="Ted Blank" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Ted+Blank/default.aspx" /><category term="Texas Instruments" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Texas+Instruments/default.aspx" /></entry><entry><title>My Favorite nport Settings for Spectre and SpectreRF</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2011/03/23/my-favorite-nport-settings.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2011/03/23/my-favorite-nport-settings.aspx</id><published>2011-03-23T17:00:00Z</published><updated>2011-03-23T17:00:00Z</updated><content type="html">The nport component located in analogLib can be used in circuits for Spectre and SpectreRF simulations. It is a scattering parameter (S-parameter) based distributed multi-port element. The nport truly is a &amp;quot;black box&amp;quot;&amp;hellip; It can be used to model dramatically different systems, such as: lowpass/bandpass systems highpass/bandstop systems allpass systems systems with delay It is nearly i mpossible to have a &amp;quot;one size fits all&amp;quot; default setting. In recent releases, a great deal...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2011/03/23/my-favorite-nport-settings.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1260942" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="RFIC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RFIC/default.aspx" /><category term="Circuit simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+simulation/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="Analog Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Analog+Simulation/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="nport" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/nport/default.aspx" /><category term="analogLib" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analogLib/default.aspx" /><category term="nport settings" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/nport+settings/default.aspx" /></entry><entry><title>Tips for Simulating a Transmit Mixer in SpectreRF</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2011/03/10/tips-for-simulating-a-transmit-mixer-in-spectrerf.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2011/03/10/tips-for-simulating-a-transmit-mixer-in-spectrerf.aspx</id><published>2011-03-10T21:00:00Z</published><updated>2011-03-10T21:00:00Z</updated><content type="html">Some typical questions that I receive from newer SpectreRF users are: How do I simulate a transmit mixer? How do I look at both upper and lower sidebands? How do I set up my simulation for PAC and Pnoise? When I plot my data, how do the indexes correspond with the sidebands? Hopefully the following will help you understand how to do this! Okay, say you have a transmit mixer. Your IF is 40MHz and your LO is 5.4GHz. 1. First, let&amp;#39;s look at the mixing product above the carrier: 5.4G+40M If you are...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2011/03/10/tips-for-simulating-a-transmit-mixer-in-spectrerf.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1260821" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="ADE-L" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ADE-L/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="Analog Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Analog+Simulation/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="mixer" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/mixer/default.aspx" /></entry><entry><title>Measuring Transistor fmax</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2010/12/07/measuring-transistor-fmax.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2010/12/07/measuring-transistor-fmax.aspx</id><published>2010-12-07T22:00:00Z</published><updated>2010-12-07T22:00:00Z</updated><content type="html">There were several questions about measuring transistor f max in comments posted to my previous Measuring Transistor f t and Simulating MOS Transistor f t blog posts. So in this posting we will look at simulating transistor s-parameters and device characteristics including f max , noise, and distortion. There are two parts to the characterizing a device -- creating the testbench and performing the measurement. First, we will look at creating a testbench to measure transistor s-parameters. While we...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2010/12/07/measuring-transistor-fmax.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1246058" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author></entry><entry><title>New Fast Envelope in MMSIM10.1 is *Really* Fast and Accurate!</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2010/11/15/new-fast-envelope-in-mmsim10-1-is-really-fast.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2010/11/15/new-fast-envelope-in-mmsim10-1-is-really-fast.aspx</id><published>2010-11-16T00:00:00Z</published><updated>2010-11-16T00:00:00Z</updated><content type="html">Traditionally, envelope analysis is used to simulate circuits with modulated inputs. Envelope analysis is much faster than transient simulation, and is used for simulating spectral regrowth. Regular envelope analysis is &amp;quot;brute force&amp;quot; transistor-level simulation: Simulation time for traditional envelope analysis can take hours to days, depending on designers&amp;rsquo; specified stop time for simulation. It&amp;#39;s accurate and includes all the nonlinearity effects. Fast envelope analysis technology...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2010/11/15/new-fast-envelope-in-mmsim10-1-is-really-fast.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1210861" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="envelope" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/envelope/default.aspx" /><category term="simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/simulation/default.aspx" /><category term="fast envelope" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/fast+envelope/default.aspx" /></entry><entry><title>Virtuoso APS Supports RF Analyses in MMSIM 7.2 and MMSIM 10.1</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2010/10/29/virtuoso-aps-now-supports-rf-analyses.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2010/10/29/virtuoso-aps-now-supports-rf-analyses.aspx</id><published>2010-10-30T00:00:00Z</published><updated>2010-10-30T00:00:00Z</updated><content type="html">A new multi-threading capability has greatly improved simulation speed for RF Designers! In MMSIM7.2, we introduced APS for Harmonic Balance analyses (multi-threaded harmonic balance simulation). In MMSIM10.1, we added support for APS in Shooting PSS and small signal analyses (multi-threaded shooting pss simulation) There are only a few limitations of APS support remaining in MMSIM 10.1. QPSS and QPxx small signal analyses. Netlists using swapfile. Distributed components (mtline, nport). Shooting...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2010/10/29/virtuoso-aps-now-supports-rf-analyses.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1210782" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="APS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/APS/default.aspx" /><category term="MMSIMM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIMM/default.aspx" /></entry><entry><title>Measure Twice, Cut Once for Transistor ft</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2010/10/06/measure-twice-cut-once.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2010/10/06/measure-twice-cut-once.aspx</id><published>2010-10-06T16:00:00Z</published><updated>2010-10-06T16:00:00Z</updated><content type="html">Recently there was an inquiry about the methodology for performing the f t (transition frequency) versus Ic measurement described in my Measuring Transistor f t blog post from July 2008: By bid75 on September 8, 2010 I am unable to understand how ft vs. Ic plot is generated. How do you do a nested sweep of dc bias current and ac analysis to determine ft at each bias current? Initially, I was just going to fire off a quick response. However, after thinking about the question, it seemed like a topic...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2010/10/06/measure-twice-cut-once.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=1179380" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author><category term="Measuring Transistor ft" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Measuring+Transistor+ft/default.aspx" /><category term="Virtuoso" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso/default.aspx" /><category term="ADE-L" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ADE-L/default.aspx" /><category term="Analog Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Analog+Simulation/default.aspx" /><category term="parametric" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/parametric/default.aspx" /><category term="ADE" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ADE/default.aspx" /><category term="sweep" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/sweep/default.aspx" /><category term="RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF/default.aspx" /><category term="Ft" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Ft/default.aspx" /><category term="transistor" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/transistor/default.aspx" /><category term="analysis" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/analysis/default.aspx" /></entry><entry><title>New Time-Saving Feature in IC6.1.4 ISR2:  Plot S-Parameter Data Directly From ViVA!</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2010/05/20/new-time-saving-feature-in-ic6-1-4-isr2-you-can-now-plot-s-parameter-data-directly-from-viva.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2010/05/20/new-time-saving-feature-in-ic6-1-4-isr2-you-can-now-plot-s-parameter-data-directly-from-viva.aspx</id><published>2010-05-20T17:28:00Z</published><updated>2010-05-20T17:28:00Z</updated><content type="html">If you haven&amp;#39;t heard about it....there is a new feature in IC6.1.4 ISR2 which makes troubleshooting circuits containing nports ( s-parameters ) much easier and faster! Starting i n IC6.1.4 ISR2, you can now plot s-parameters directly in ViVA (without having to create a test bench and run a Spectre sp simulation). This is a fantastic time-saver! Why would I want to use this? You may want to view the s-parameter data in the frequency domain prior to time domain simulation to verify that the s-parameter...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2010/05/20/new-time-saving-feature-in-ic6-1-4-isr2-you-can-now-plot-s-parameter-data-directly-from-viva.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=62065" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Circuit design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="RF designer" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+designer/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="RFIC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RFIC/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="PSS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PSS/default.aspx" /><category term="ViVA" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ViVA/default.aspx" /><category term="ADE-L" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ADE-L/default.aspx" /></entry><entry><title>Using RF Simulation Technology for Analog Applications</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2010/05/18/using-rf-simulation-technology-for-analog-applications.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2010/05/18/using-rf-simulation-technology-for-analog-applications.aspx</id><published>2010-05-18T22:57:00Z</published><updated>2010-05-18T22:57:00Z</updated><content type="html">The particular nature of analog circuits puts restrictive requirements on circuit simulators. The EDA industry has introduced proven shortcuts to deliver simulation speed and accuracy for specific applications, e.g. Harmonic Balance for RF and partitioning for custom digital applications. These shortcuts do not cut it for the mainstream analog circuits, leaving analog designers with nothing but the good old transient analysis. Modern communication standards and advanced process nodes pose tough challenges...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2010/05/18/using-rf-simulation-technology-for-analog-applications.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=62206" width="1" height="1"&gt;</content><author><name>Hany</name><uri>http://www.cadence.com/Community/members/Hany.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="RF Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Simulation/default.aspx" /><category term="Analog Smart" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Analog+Smart/default.aspx" /><category term="Analog Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Analog+Simulation/default.aspx" /></entry><entry><title>Using The Composite Triple Beat Source to Speed up QPSS Analysis</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2010/01/14/using-the-composite-triple-beat-source-to-speed-up-qpss-analysis.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2010/01/14/using-the-composite-triple-beat-source-to-speed-up-qpss-analysis.aspx</id><published>2010-01-14T14:00:00Z</published><updated>2010-01-14T14:00:00Z</updated><content type="html">Say you have a design with 4 input frequencies: 3164M (vco), 1449M (tone0), 1456M (tone1), 1442M (tone2). Currently when you do a qpss analysis, you are inserting a total of 4 separate ports in your schematic and running a simulation. There is a divide by 2 in your circuit, so one of the frequencies of interest is 1582M. You&amp;#39;d like to take advantage of the multi-tone port and run a qpss analysis using 2 sources, rather than having to set up 4 individual ports. What you&amp;#39;ll want to use is the...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2010/01/14/using-the-composite-triple-beat-source-to-speed-up-qpss-analysis.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=19863" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="RF Block Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Block+Simulation/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="RFIC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RFIC/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="QPSS Analysis" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/QPSS+Analysis/default.aspx" /><category term="Composite Triple Beat" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Composite+Triple+Beat/default.aspx" /><category term="CTB" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/CTB/default.aspx" /></entry><entry><title>NPORT S-Parameter Model Enhancements</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/12/30/nport-s-parameter-model-enhancements.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/12/30/nport-s-parameter-model-enhancements.aspx</id><published>2009-12-30T14:00:00Z</published><updated>2009-12-30T14:00:00Z</updated><content type="html">In MMSIM 7.2, two new parameters have been added to the Spectre nport primitive: datatrunc and causality . In MMSIM 7.1, passivity checking was added. The nport now has causality correction, passivity checking and enforcement, and the ability to remove small couplings terms from the input s-parameter data. The datatrunc parameter removes small relative coupling data in your s-parameter file. This improves capability and performance for simulating large scale nport systems. You can adjust this value...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/12/30/nport-s-parameter-model-enhancements.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=24095" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Circuit design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+design/default.aspx" /><category term="RF Block Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Block+Simulation/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="MMSIM71" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM71/default.aspx" /><category term="RFIC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RFIC/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /><category term="Circuit simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+simulation/default.aspx" /></entry><entry><title>Analyzing Distortion With Spectre RF</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/12/18/analyzing-distortion-with-spectre-rf.aspx" /><link rel="enclosure" type="image/x-png" length="47681" href="http://www.cadence.com/Community/blogs/rf/attachment/24074.ashx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/12/18/analyzing-distortion-with-spectre-rf.aspx</id><published>2009-12-18T18:30:00Z</published><updated>2009-12-18T18:30:00Z</updated><content type="html">Greetings, In the previous appends, we looked at using Shooting Newton Periodic Steady-State analysis to analyze analog circuits. In this append, we will look at using Harmonic Balance Periodic Steady-State, HBPSS, to analyze analog circuits. HBPSS is widely used for RF and microwave circuit design. However, designers often do not realize that it can also be useful for analog circuit design, in particular, when they would like to analyze distortion. As an example, we will simulate the Total Harmonic...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/12/18/analyzing-distortion-with-spectre-rf.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=24074" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="PSS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PSS/default.aspx" /><category term="FFT" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/FFT/default.aspx" /><category term="Distortion" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Distortion/default.aspx" /></entry><entry><title>RF Measurement Library: Capturing Circuit Characterization Setups on the Schematic</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/07/16/RF-Measurement-Library_3A00_-Capturing-circuit-characterization-setups-on-the-schematic.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/07/16/RF-Measurement-Library_3A00_-Capturing-circuit-characterization-setups-on-the-schematic.aspx</id><published>2009-07-16T13:00:00Z</published><updated>2009-07-16T13:00:00Z</updated><content type="html">Another design approach that Cadence supports that may not be obvious to all users&amp;hellip; The process of setting up a circuit simulation has historically been one of setting up all of the simulation control parameters (i.e. which analysis you want to run, what simulation data you want to save, accuracy tolerances, etc.) and then, after the simulation has completed, defining the measurements you want to make (i.e. noise figure, dc supply current, gain, etc.). The expectation here is that the user...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/07/16/RF-Measurement-Library_3A00_-Capturing-circuit-characterization-setups-on-the-schematic.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=19216" width="1" height="1"&gt;</content><author><name>alanw</name><uri>http://www.cadence.com/Community/members/alanw.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="RFIC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RFIC/default.aspx" /><category term="RF Measurement library" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Measurement+library/default.aspx" /><category term="Circuit simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+simulation/default.aspx" /><category term="Custom Design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Custom+Design/default.aspx" /><category term="design framework" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/design+framework/default.aspx" /></entry><entry><title>Periodic Steady-State Analysis for DC-to-DC Converters</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/06/30/periodic-steady-state-analysis-for-dc-to-dc-converters.aspx" /><link rel="enclosure" type="application/octet-stream" length="2715796" href="http://www.cadence.com/Community/blogs/rf/attachment/18703.ashx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/06/30/periodic-steady-state-analysis-for-dc-to-dc-converters.aspx</id><published>2009-06-30T14:30:00Z</published><updated>2009-06-30T14:30:00Z</updated><content type="html">In &amp;quot; Spectre RF by any other name ...&amp;quot;, a non-RF application for Spectre RF&amp;#39;s periodic steady-state analysis was introduced. An example of using periodic steady-state analysis [PSS] to simulate the dynamic performance: THD and SFDR, of a switched-current Digital-to-Analog Converter [DAC] was presented. In this append, we will look at using periodic steady-state analysis for another non-RF application, switching regulator simulation. Switching regulators are the core of switched-mode...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/06/30/periodic-steady-state-analysis-for-dc-to-dc-converters.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=18703" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="DAC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/DAC/default.aspx" /><category term="PSS" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/PSS/default.aspx" /><category term="DC-to-DC converters" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/DC-to-DC+converters/default.aspx" /><category term="shooting newton" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/shooting+newton/default.aspx" /><category term="SFDR" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/SFDR/default.aspx" /><category term="THD" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/THD/default.aspx" /></entry><entry><title>Join us at the Cadence booth at the International Microwave Symposium</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/06/08/join-us-at-the-cadence-booth-at-the-international-microwave-symposium.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/06/08/join-us-at-the-cadence-booth-at-the-international-microwave-symposium.aspx</id><published>2009-06-08T21:00:00Z</published><updated>2009-06-08T21:00:00Z</updated><content type="html">If you listened to Tom&amp;#39;s advice on this blog two months ago and registered for the International Microwave Symposium or the RFIC symposium, then you should be at the Boston Convention center now enjoying RFIC talks. Please remember that we are waiting for you at the Cadence booth on the exhibition floor. When you visit the Cadence booth, you will participate in demos and chalk talks about the latest RFIC simulation technologies in the Cadence Virtuoso Custom Design Platform . You will see how...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/06/08/join-us-at-the-cadence-booth-at-the-international-microwave-symposium.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=18250" width="1" height="1"&gt;</content><author><name>Hany</name><uri>http://www.cadence.com/Community/members/Hany.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="RFIC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RFIC/default.aspx" /><category term="Virtuoso" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso/default.aspx" /><category term="International Microwave Symposium" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/International+Microwave+Symposium/default.aspx" /></entry><entry><title>Enhanced pnoise Algorithm to Compute Phase-Noise for VCOs with Bandgap Voltage Reference </title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/05/01/enhanced-pnoise-algorithm-to-compute-phase-noise-for-vcos-with-bandgap-voltage-reference.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/05/01/enhanced-pnoise-algorithm-to-compute-phase-noise-for-vcos-with-bandgap-voltage-reference.aspx</id><published>2009-05-01T13:00:00Z</published><updated>2009-05-01T13:00:00Z</updated><content type="html">Accurate phase-noise characterization is critical in the design of RF and microwave communication systems. SpectreRF &amp;rsquo;s shooting PSS/Pnoise analysis has been the golden simulator for the phase-noise simulation, and close correlation between the simulation results and silicon measurement was well reported by many research and industrial institutes. As the IC voltage references, such as bandgap reference, are widely used as DC biasing circuitry in deep-submicron low noise VCO design because of...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/05/01/enhanced-pnoise-algorithm-to-compute-phase-noise-for-vcos-with-bandgap-voltage-reference.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=17305" width="1" height="1"&gt;</content><author><name>helenet</name><uri>http://www.cadence.com/Community/members/helenet.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="DC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/DC/default.aspx" /><category term="VCO" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/VCO/default.aspx" /><category term="IC Voltage" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/IC+Voltage/default.aspx" /><category term="MMSIM" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM/default.aspx" /></entry><entry><title>2009 RFIC Symposium in Boston - Are You Going?</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/04/27/2009-RFIC-Symposium-in-Boston-_2D00_-Are-You-Going_3F00_.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/04/27/2009-RFIC-Symposium-in-Boston-_2D00_-Are-You-Going_3F00_.aspx</id><published>2009-04-27T13:01:00Z</published><updated>2009-04-27T13:01:00Z</updated><content type="html">If you are an RFIC designer then I hope you are planning on attending the 2009 RFIC Symposium and the International Microwave Symposium (IMS) which will be held in Boston, Massachusetts, as the centerpieces of Microwave Week 2009, scheduled from Sunday June 7 through Friday June 12, 2009. The 2009 RFIC Symposium is one of the foremost IEEE technical conferences dedicated to the latest innovations in RFIC development for wireless and wire line communication ICs and emerging applications. Running in...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/04/27/2009-RFIC-Symposium-in-Boston-_2D00_-Are-You-Going_3F00_.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=17030" width="1" height="1"&gt;</content><author><name>TomC</name><uri>http://www.cadence.com/Community/members/TomC.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Circuit design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+design/default.aspx" /><category term="wireless integrated circuit verification" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/wireless+integrated+circuit+verification/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="RFIC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RFIC/default.aspx" /></entry><entry><title>Spectre RF By Any Other Name ...</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/04/22/spectre-rf-by-any-other-name.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/04/22/spectre-rf-by-any-other-name.aspx</id><published>2009-04-22T13:00:00Z</published><updated>2009-04-22T13:00:00Z</updated><content type="html">It has been a while since I last appende d , hope you are well! It was a little bit difficult to come up with a subject to write about and then recently I was in a meeting where we were talking about transient noise analysis. A designer was discussing the issue of analyzing the noise of a Pipeline ADC as an example of how they use the transient noise. The conversation started me to wondering whether or not this might be a good application for Spectre RF . After all, Spectre RF PNOISE analysis can...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/04/22/spectre-rf-by-any-other-name.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=16932" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="DAC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/DAC/default.aspx" /><category term="ADC" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/ADC/default.aspx" /></entry><entry><title>Setting VIVA Waveform Color Defaults When Using ADE</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/04/21/setting-viva-waveform-color-defaults-when-using-ade.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/04/21/setting-viva-waveform-color-defaults-when-using-ade.aspx</id><published>2009-04-21T13:00:00Z</published><updated>2009-04-21T13:00:00Z</updated><content type="html">I found myself getting a little bit frustrated with some of the default colors that would come up in the VIVA waveform tool while I was plotting from the Analog Design Environment (ADE). After working with Kabir, the Product Engineer for VIVA, I discovered that the colors for the waveform defaults are actually being set by ADE. There are a set of probe layers or Y layers in the Display Resource File that ADE cycles through to match up highlighted nets on the schematic with traces in the waveform...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/04/21/setting-viva-waveform-color-defaults-when-using-ade.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=15922" width="1" height="1"&gt;</content><author><name>dondnile</name><uri>http://www.cadence.com/Community/members/dondnile.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="MMSIM71" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM71/default.aspx" /></entry><entry><title>Setting Up Harmonic Balance - Part 1</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/03/18/setting-up-harmonic-balance-part-1.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/03/18/setting-up-harmonic-balance-part-1.aspx</id><published>2009-03-18T19:01:00Z</published><updated>2009-03-18T19:01:00Z</updated><content type="html">This is the first of a series of Blogs to talk about how to fill out the forms for Harmonic Balance. I will include our suggested settings and some helpful hints. I will add to these over time as new things come up both from us and our customer base. Harmonic Balance works in the frequency domain and is a very efficient way to describe systems operating in steady-state. HB is VERY efficient for systems that have sinusoidal tones. As the tones become more nonlinear, or more &amp;quot;square&amp;quot; in nature...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/03/18/setting-up-harmonic-balance-part-1.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=15915" width="1" height="1"&gt;</content><author><name>dondnile</name><uri>http://www.cadence.com/Community/members/dondnile.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /><category term="spectreRF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/spectreRF/default.aspx" /><category term="MMSIM71" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MMSIM71/default.aspx" /></entry><entry><title>Shhhhh.....SpectreRF Tutorials and AppNotes - One of Our Best Kept Secrets!</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/02/09/shhhhh-spectrerf-tutorials-and-appnotes-one-of-our-best-kept-secrets.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/02/09/shhhhh-spectrerf-tutorials-and-appnotes-one-of-our-best-kept-secrets.aspx</id><published>2009-02-09T11:00:00Z</published><updated>2009-02-09T11:00:00Z</updated><content type="html">Did you know that we have hidden a wide variety of SpectreRF Tutorials, Workshops, and Appnotes in your MMSIM hieararchy? In your &amp;lt;MMSIM71&amp;gt;/tools/spectre/examples/SpectreRF_workshop directory there are the following tutorials, appNotes, and workshops: RF Workshop Tutorials The RF Workshop Tutorials show how to simulate typical RF circuits such as LNAs, Mixers, VCOs, and PAs in spectreRF. Note that the database is in cdba (not oa, open access). The RF Workshop HB Tutorials show similar simulations...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/02/09/shhhhh-spectrerf-tutorials-and-appnotes-one-of-our-best-kept-secrets.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=13917" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="RF Block Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Block+Simulation/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>SpectreRF Turbo: Parasitic Reduction</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/02/02/spectrerf-turbo-parasitic-reduction.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/02/02/spectrerf-turbo-parasitic-reduction.aspx</id><published>2009-02-02T11:00:00Z</published><updated>2009-02-02T11:00:00Z</updated><content type="html">I wanted to share some experiences I had with SpectreRF-Turbo and Parasitic reduction on a recent large benchmark. The things I learned may be helpful to anyone who wants to get the most out of turbo and parasitic reduction. Available in MMSIM7.0.1 and later for RF, turbo accelerates simulation in three ways: 1) by more efficiently evaluating the BSIM3 and BSIM4 devices, 2) the matrix is handled more effeciently and 3) turbo divides the job accross multi-core machines. Parasitic reduction reduces...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/02/02/spectrerf-turbo-parasitic-reduction.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=14274" width="1" height="1"&gt;</content><author><name>dondnile</name><uri>http://www.cadence.com/Community/members/dondnile.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="RF Block Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Block+Simulation/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /><category term="Turbo" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Turbo/default.aspx" /><category term="Parasitic Reduction" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Parasitic+Reduction/default.aspx" /><category term="Harmonic Balance" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Harmonic+Balance/default.aspx" /></entry><entry><title>Noise and Jitter Analysis for PLL-Based Frequency Synthethiser Using SpectreRF</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/28/noise-and-jitter-analysis-for-pll-based-frequency-synthethiser-using-spectrerf.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/01/28/noise-and-jitter-analysis-for-pll-based-frequency-synthethiser-using-spectrerf.aspx</id><published>2009-01-28T16:37:00Z</published><updated>2009-01-28T16:37:00Z</updated><content type="html">Cadence will present SpectreRF Noise aware PLL flow latest enhancements at the DesignCon 2009 conference, based in Santa Clara . In the paper &amp;quot;Noise and Jitter Analysis for PLL-Based Frequency Synthesizer&amp;quot;, we fully describe SpectreRF flow and provide a testbench for each PLL building block, such as VCO, PFD/CP, and FD, where their voltage-domain models with noise information are extracted to capture their dominant behaviors. The models are used in the top-level PLL simulation to identify...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/28/noise-and-jitter-analysis-for-pll-based-frequency-synthethiser-using-spectrerf.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=14213" width="1" height="1"&gt;</content><author><name>helenet</name><uri>http://www.cadence.com/Community/members/helenet.aspx</uri></author></entry><entry><title>SpectreRF GUI Support for MMSIM 7.1</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/23/tip-of-the-week-spectrerf-gui-support-for-mmsim-7-1.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/01/23/tip-of-the-week-spectrerf-gui-support-for-mmsim-7-1.aspx</id><published>2009-01-23T14:00:00Z</published><updated>2009-01-23T14:00:00Z</updated><content type="html">MMSIM 7.1 has just been released! The following IC release GUIs support the new MMSIM7.1 features: IC5.1.41.500.5.129 (However, USR6 or later is strongly recommended) IC6.1.1 ISR65 IC6.1.3 ISR5 And later subversions. For more information, similar tips, and design topics, please visit sourcelink.cadence.com ....(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/23/tip-of-the-week-spectrerf-gui-support-for-mmsim-7-1.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=13756" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>MMSIM 7.1 Enhancements Benefit RF Designers!</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/14/tip-of-the-week-mmsim-7-1-enhancements-benefit-rf-designers.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/01/14/tip-of-the-week-mmsim-7-1-enhancements-benefit-rf-designers.aspx</id><published>2009-01-14T20:00:00Z</published><updated>2009-01-14T20:00:00Z</updated><content type="html">The 7.1 release of MMSIM is scheduled for mid-January. There are many exciting RF enhancements that will be useful for RF designers. 1. Three new RF analyses using the harmonic balance engine, have been introduced to make the Spectre RF easier to use: HB, HBAC, and HBnoise. HB analysis (hb) provides the periodic steady-state response for typical RF circuits such as LNAs and Mixers. It supports one or more fundamental frequencies (tones). HB analysis combines the Harmonic Balance PSS/QPSS analyses...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/14/tip-of-the-week-mmsim-7-1-enhancements-benefit-rf-designers.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=13757" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Tip of the Week:  Guidelines for getting accurate HB QPSS/QPNoise results</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/09/guidelines-for-getting-accurate-hb-qpss-qpnoise-results.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/01/09/guidelines-for-getting-accurate-hb-qpss-qpnoise-results.aspx</id><published>2009-01-09T14:00:00Z</published><updated>2009-01-09T14:00:00Z</updated><content type="html">Two of the most important parameters for accuracy are: (1) maxharms (2) oversample maxharms: The accuracy of HB is greatly dependent on the number of harmonics chosen. As a general rule, you should simulate with with maxharms [5 3] and (if memory allows) re-simulate with maxharms [7 3] to see if the answer changes (or not). If the answer does not change, you can be confident about your results. For circuits with dividers, the number of harmonics chosen should equal 5 times the divide ratio. This...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/09/guidelines-for-getting-accurate-hb-qpss-qpnoise-results.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=13490" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Circuit design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>How to Simulate a Subcircuit (Netlist) With Spectre in ADE</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/07/tip-of-the-week-how-to-simulate-a-subcircuit-netlist-with-spectre-in-ade.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2009/01/07/tip-of-the-week-how-to-simulate-a-subcircuit-netlist-with-spectre-in-ade.aspx</id><published>2009-01-07T21:00:00Z</published><updated>2009-01-07T21:00:00Z</updated><content type="html">Many users ask, &amp;quot;How do I instantiate a netlist into my schematic and simulate with spectre in ADE?&amp;quot; To instantiate a subcircuit (netlist) in your schematic and simulate with spectre in ADE you need to create a cell with a CDF parameter &amp;#39;model&amp;#39; which will point to the text subcircuit that you want to use for simulating. Here is the recipe: Create a symbol view for the text subcircuit. Make a copy of this symbol view and call the new view &amp;quot;spectre.&amp;quot; Open the base CDF for...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2009/01/07/tip-of-the-week-how-to-simulate-a-subcircuit-netlist-with-spectre-in-ade.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=13758" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="Circuit design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Going broadside with electromagnetic modeling of advanced processes</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/10/09/going-broadside-with-electromagnetic-modeling-of-advanced-processes.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/10/09/going-broadside-with-electromagnetic-modeling-of-advanced-processes.aspx</id><published>2008-10-09T13:30:00Z</published><updated>2008-10-09T13:30:00Z</updated><content type="html">It has caught my attention that designs using fabrication processes such as 65nm, 45nm, 32nm, and smaller, have changed the landscape when it comes to electromagnetic (EM) modeling of components and interconnects. These designs have to contend with the pronounced effects of increased broadside coupling. This is a result of the change in aspect ratio in the metal where it is now taller than wider in these new processes. The ability to mesh the sidewalls in planar EM solvers is key to addressing the...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2008/10/09/going-broadside-with-electromagnetic-modeling-of-advanced-processes.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=11814" width="1" height="1"&gt;</content><author><name>TomC</name><uri>http://www.cadence.com/Community/members/TomC.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Circuit design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+design/default.aspx" /><category term="Electromagnetic analysis" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Electromagnetic+analysis/default.aspx" /><category term="wireless integrated circuit verification" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/wireless+integrated+circuit+verification/default.aspx" /><category term="Electromagnetic (EM)" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Electromagnetic+_2800_EM_2900_/default.aspx" /><category term="Virtuoso RF Designer" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+RF+Designer/default.aspx" /></entry><entry><title>Tip of the Week: When should I use the pss/qpss Harmonic Balance vs. Shooting Newton Engine?</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/09/03/tip-of-the-week-when-to-use-harmonic-balance-engine-vs-shooting-newton-engine.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/09/03/tip-of-the-week-when-to-use-harmonic-balance-engine-vs-shooting-newton-engine.aspx</id><published>2008-09-03T12:02:00Z</published><updated>2008-09-03T12:02:00Z</updated><content type="html">Shooting Newton (shooting) and harmonic balance (HB) are complementary technologies and used for circuits that exhibit different behaviors. The shooting Newton algorithm uses an adaptive time step control, which is particularly effective for sharp transitions. Convergence is robust and not as sensitive to model imperfections. Harmonic balance is much faster for mildly nonlinear circuits. When the simulation parameters are set up properly, both should give accurate, very similar results (however,...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2008/09/03/tip-of-the-week-when-to-use-harmonic-balance-engine-vs-shooting-newton-engine.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=11093" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Circuit design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Tip of the Week: Guidelines for simulating oscillators - phase noise simulations</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/08/26/guidelines-for-simulating-oscillators-phase-noise-simulations.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/08/26/guidelines-for-simulating-oscillators-phase-noise-simulations.aspx</id><published>2008-08-26T15:07:00Z</published><updated>2008-08-26T15:07:00Z</updated><content type="html">When simulating oscillators, it is important to choose the correct simulator engine (shooting Newton vs. harmonic balance.) In general, we suggest that you use the HB (harmonic balance) engine as your first choice. In addition, there are situations where you may need to use the augmented=yes pnoise option. For LC type oscillators (mildly nonlinear), we strongly suggest using the HB engine. For ring oscillators (or circuits that contain digital elements such as dividers), the HB engine may have trouble...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2008/08/26/guidelines-for-simulating-oscillators-phase-noise-simulations.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10863" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Tip of the Week:  New nport parameter ( dcextrap ) for modeling longer transmission lines</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/08/18/tip-of-the-week-new-nport-parameter-dcextrap-for-modeling-longer-transmission-lines.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/08/18/tip-of-the-week-new-nport-parameter-dcextrap-for-modeling-longer-transmission-lines.aspx</id><published>2008-08-18T18:21:00Z</published><updated>2008-08-18T18:21:00Z</updated><content type="html">There is a new nport parameter, dcextrap, available in MMSIM 6.2.1. The values are constant or unwrap. The default is constant. dcextrap is typically used when the nport s-parameter data file models a system with long delay &amp;ndash; and -- the DC point is not included in the s-parameter data file. One problem that occurs in these systems is the default extrapolation mechanism for the phase calculation results in an incorrect value of phase at DC, and then continues to be incorrect up to Fmin (the...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2008/08/18/tip-of-the-week-new-nport-parameter-dcextrap-for-modeling-longer-transmission-lines.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10460" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Simulating MOS Transistor ft</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/08/09/simulating-mos-transistor-ft.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/08/09/simulating-mos-transistor-ft.aspx</id><published>2008-08-09T07:25:00Z</published><updated>2008-08-09T07:25:00Z</updated><content type="html">One other question that you might ask is, this approach works for bipolars but what happens when you need to characterize a MOS transistor. Nothing changes, use the same testbench and measurements, see figure 1. In this testbench a MOS transistor is being compared to a bipolar transistor. Figure 1: MOS and BJT Comparison The simulation results are shown in Figure 2. The difference in the results is that the low frequency bipolar transistors current gain is limited by the base current, while the MOS...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2008/08/09/simulating-mos-transistor-ft.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10665" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="bipolar transistor" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/bipolar+transistor/default.aspx" /><category term="MOS transistor" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/MOS+transistor/default.aspx" /></entry><entry><title>Tip Of the Week: analogLib mtline now has a cross sectional viewer when Type of Input=Field Solver</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/08/04/tip-of-the-week-analoglib-mtline-now-has-a-cross-sectional-viewer-when-type-of-input-field-solver.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/08/04/tip-of-the-week-analoglib-mtline-now-has-a-cross-sectional-viewer-when-type-of-input-field-solver.aspx</id><published>2008-08-04T18:10:00Z</published><updated>2008-08-04T18:10:00Z</updated><content type="html">Many users have indicated that it is challenging to correctly enter complex transmission lines (multiple conductors, conductors at different heights, and multiple dielectrics) into the analogLib mtline when using the Field Solver Type of Input. You wanted to see a cross-sectional view of your transmission line to verify that your transmission line cross-section is correct. In the past, you may have used the LMG standalone utility to view the transmission line cross-sectional view, but it is no longer...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2008/08/04/tip-of-the-week-analoglib-mtline-now-has-a-cross-sectional-viewer-when-type-of-input-field-solver.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10455" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Tip of the Week: Why Do Shooting and Harmonic Balance Phase Noise Results Differ?</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/07/29/why-do-shooting-and-harmonic-balance-phase-noise-results-differ.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/07/29/why-do-shooting-and-harmonic-balance-phase-noise-results-differ.aspx</id><published>2008-07-29T15:12:00Z</published><updated>2008-07-29T15:12:00Z</updated><content type="html">Question: You are simulating your VCO in SpectreRF. You ran your PSS + Pnoise (noisetype=sources) simulations using the Shooting engine pss+pnoise and plotted the phase noise. You noticed that the SpectreRF phase noise results differ significantly for the Shooting Newton vs. Flexible Balance engines. In the Shooting Pnoise analysis, there are Floquet warnings in your spectre.out file. ------------------------------------------------ WARNING (SPCRTRF-15093): The Floquet eigenspace computed by the...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2008/07/29/why-do-shooting-and-harmonic-balance-phase-noise-results-differ.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10396" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Tip of the Week:  Please explain in more practical (less theoretical) terms the concept of  "oscillator line width."</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/07/25/please-explain-in-more-practical-less-theoretical-terms-the-concept-of-quot-oscillator-line-width-quot.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/07/25/please-explain-in-more-practical-less-theoretical-terms-the-concept-of-quot-oscillator-line-width-quot.aspx</id><published>2008-07-25T22:45:00Z</published><updated>2008-07-25T22:45:00Z</updated><content type="html">Question: From spectre -h pnoise. I find the definition for oscillator linewidth: ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ &amp;quot; In a phase noise analysis for an oscillator, the line width, which is also known as the corner frequency, is defined as either the full width at half maximum (FWHM), or as twice the half power (-3dB) width (HW). In the absence of 1/f noise and ignoring any noise floor, the phase noise spectrum satisfies the Lorentzian equation: L(f) = (1/pi) * [ pi *...(&lt;a href="http://www.cadence.com/Community/blogs/rf/archive/2008/07/25/please-explain-in-more-practical-less-theoretical-terms-the-concept-of-quot-oscillator-line-width-quot.aspx"&gt;read more&lt;/a&gt;)&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10393" width="1" height="1"&gt;</content><author><name>Tawna</name><uri>http://www.cadence.com/Community/members/Tawna.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Measuring Transistor ft </title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/07/16/measuring-transistor-ft.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/07/16/measuring-transistor-ft.aspx</id><published>2008-07-16T13:30:00Z</published><updated>2008-07-16T13:30:00Z</updated><content type="html">&lt;p&gt;So let&amp;rsquo;s consider a practical example of creating test benches and performing measurements, starting with how to characterize a transistor. A couple of questions to consider before starting are: &lt;br /&gt;&lt;br /&gt;What parameters do you want to measure?&lt;br /&gt;What types of test benches are required to measure these parameters? &lt;br /&gt;&lt;br /&gt;Let&amp;rsquo;s start by considering how to measure the ft of a transistor, ft is a standard figure of merit used by analog designers to evaluate a transistor&amp;rsquo;s performance. Later we will consider how to measure some other common transistor parameters fmax, Noise Figure, as well as, measuring device stability.&lt;br /&gt;&lt;br /&gt;First, let&amp;rsquo;s review the meaning of ft. It is defined as the unity gain frequency of a transistor&amp;rsquo;s short circuit current gain. The first point is that we need to measure the short circuit current gain so ideally the output terminal, collector [drain] of the transistor will be connected to a power supply. The next point is that we need to calculate the current gain of the transistor. For Virtuoso Analog Design Environment users, the Virtuoso Visualization and Analysis waveform calculator can be used to perform this measurement. To calculate ft, plot the current gain by dividing the collector [drain] current by the base [gate] current and then using the cross function to find the unity gain frequency. An example of calculating ft, is shown in Figure 1.&lt;br /&gt;&lt;br /&gt;


&lt;a href="http://www.cadence.com/Community/blogs/rf/Art_07162008/ft_plot_fig1_ft123.jpg"&gt;&lt;img src="http://www.cadence.com/Community/blogs/rf/Art_07162008/ft_plot_fig1_ft123.jpg" border="0" alt="" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Figure 1: Measuring Transistor f&lt;sub&gt;t&lt;/sub&gt;&lt;/b&gt;&lt;br /&gt;&lt;br /&gt;When creating a simulation test bench the natural place to start is the actual measurement test bench. To measure ft, an RF network analyzer can be used to measure the s-parameters and then the s-parameters can be converted into h-parameters. By plotting the h21, the ft can be estimated by extrapolating the unity gain frequency of the h21. This approach works well in the lab because wideband shorts do not exist in the real world. So RF measurements need to be performed with input and output matching and a result s-parameters are the natural method for characterizing transistors. One issue when testing in the lab is the need to for separate bias and RF sources. Typically these sources are isolated with a bias T. In place of a bias T, we will use an inductor [pass the bias voltage at dc] and a capacitor [pass the RF input at frequency].&lt;br /&gt;&lt;br /&gt;&lt;a href="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftsparamB.png"&gt;&lt;img src="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftsparamB.png" border="0" width="600" alt="" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Figure 2: Emulating the Network Analyzer Setup to Measure h21&lt;/b&gt; &lt;br /&gt;&lt;br /&gt;Using the lab test bench introduces some complexity that is not required when performing the measurement in simulation. By taking advantage of the &amp;ldquo;ideal&amp;rdquo; nature simulation, the test bench can be simplified. In simulation, we can create a perfect short using a voltage source. The voltage source provides bias and acts as a short circuit replacing the output matching circuitry in the original test bench. The RF input has been replaced by a current source with ac magnitude of 1 so the current gain can be directly measured. The input bias is still controlled by setting a dc voltage, see &lt;br /&gt;Figure 3. This test bench works well when measuring ft for a single bias condition. However, it is difficult to sweep the bias current of the transistor as can be done in the lab with a bias generator.&lt;/p&gt;&lt;p&gt; &lt;a href="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftvnaB.png"&gt;&lt;img src="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftvnaB.png" border="0" width="600" alt="" /&gt;&lt;/a&gt;&lt;/p&gt;&lt;p&gt;&lt;b&gt;Figure 3: Enhanced Test bench with an Output Short&lt;/b&gt; &lt;br /&gt;&lt;br /&gt;The next enhancement is to replace the bias voltage source and resistor with a diode connected transistor and a current source to set the bias current of the device under test [DUT], see Figure 4. Using a diode connected transistor to generate the bias voltage allows the bias current to be easily controlled. The dc bias and the RF input are still isolated by the pseudo bias T. This change to the test bench allows a designer to characterize the effect of bias current on ft so the transistor can be operated at its maximum ft.&lt;br /&gt;&lt;br /&gt;&lt;a href="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftdiodeB.png"&gt;&lt;img src="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftdiodeB.png" border="0" width="600" alt="" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;font face="Arial" size="2"&gt;&lt;br /&gt;&lt;b&gt;Figure 4: Improved ft Testbench&lt;/b&gt; &lt;br /&gt;&lt;br /&gt;Another enhancement to the test bench would be to replace the inductor and the capacitor used in the pseudo bias-T, shown in Figure 5. Virtuoso Spectre simulator provides users analysis dependent switches that can be set to open and closed depending on the analysis to be performed. This allows the designer to use the same test bench to perform multiple tests, for example, NF, fmax, etc. &lt;br /&gt;&lt;br /&gt;&lt;/font&gt;&lt;a href="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftswitchB.png"&gt;&lt;img src="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftswitchB.png" border="0" width="600" alt="" /&gt;&lt;/a&gt;&lt;font face="Arial" size="2"&gt;&lt;br /&gt;&lt;br /&gt;&lt;b&gt;Figure 5: Using analysis dependent switches&lt;/b&gt;&lt;br /&gt;&lt;br /&gt;The test bench I use to measure ft is even simpler, the the bias network [diode, analysis dependent switches, and RF source] is replaced by an ideal current mirror. The current mirror provides feedback to stabilize the bias point. The current source that sets the bias current is also RF input source the bias T is eliminated. BTW, you might recognize this type of circuit, it is called a Wilson current mirror, shown in Figure 6.&lt;br /&gt;&lt;br /&gt;&lt;/font&gt;&lt;a href="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftwilsonB.png"&gt;&lt;img src="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftwilsonB.png" border="0" width="600" alt="" /&gt;&lt;/a&gt;&lt;font face="Arial" size="2"&gt;&lt;b&gt;&lt;br /&gt;&lt;br /&gt;Figure 6: My ft Test bench&lt;br /&gt;&lt;/b&gt;To review the test bench development process, we started by replicating the test bench we used in the lab in simulation. Then the test bench was optimized by tuning it to take advantage the &amp;ldquo;ideal&amp;rdquo; nature of a SPICE simulator. Along the way we made several improvement to the measurements process. &lt;br /&gt;1) Directly measured the ft, eliminating the need to generate the s-parameters and then calculate the h-parameters.&lt;br /&gt;2) Added the ability to sweep the bias current so plots of ft vs. Ic can be generated, see Figure 7.&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;/font&gt;&lt;a href="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftwilson.jpg"&gt;&lt;img src="http://www.cadence.com/Community/blogs/rf/Art_07162008/ftwilson.jpg" border="0" width="600" alt="" /&gt;&lt;/a&gt;&lt;font face="Arial" size="2"&gt; &lt;br /&gt;&lt;br /&gt;&lt;font face="Arial" size="2"&gt;&lt;b&gt;Figure 7: Plot of ft vs. Ic&lt;/b&gt;&lt;/font&gt; &lt;font face="Arial" size="2"&gt;&lt;p&gt;In closing, I hope that this example of creating a test bench and making measurements will be useful for you. Please let me know what you think.&lt;/p&gt;&lt;/font&gt;&lt;p&gt;&lt;font face="Arial" size="2"&gt;Best Regards,&lt;br /&gt;Art Schaldenbrand &lt;/font&gt;&lt;/p&gt;&lt;/font&gt;&lt;/p&gt;&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10226" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Measuring Transistor ft" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Measuring+Transistor+ft/default.aspx" /></entry><entry><title>Inductors On Demand, at least one RF design task can be really automated!</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/07/13/inductors-on-demand-at-least-one-rf-design-task-can-be-really-automated.aspx" /><link rel="enclosure" type="image/jpeg" length="88489" href="http://www.cadence.com/Community/blogs/rf/attachment/10179.ashx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/07/13/inductors-on-demand-at-least-one-rf-design-task-can-be-really-automated.aspx</id><published>2008-07-14T02:52:00Z</published><updated>2008-07-14T02:52:00Z</updated><content type="html">&lt;p&gt;Inductors, transformers and transmission lines are critical components in any high frequency integrated circuit. Conventional electromagnetic tools used for the design of these components are difficult to setup, require electromagnetic expertise and are not integrated in IC design flows.&lt;/p&gt;&lt;p&gt;Traditionally, specialized modeling teams work hard for several months to design, fabricate and characterize a limited set of inductors and transformers for IC designers to choose from. They repeat this long and cumbersome procedure every time a new process node or a new design application is introduced, adding months to the overall design cycle. IC designers faced by a small selection of passive components and limited analysis capabilities are forced to over design wasting expensive Silicon area and increasing failure rates.&lt;/p&gt;&lt;p&gt;Virtuoso Passive Component Designer is a complete flow for the design, analysis and modeling of inductors, transformers and transmission lines. Tightly integrated with Virtuoso Schematic Editor and Virtuoso Layout Suite, the tool brings passive component design to the hands of analog and RF designers.&lt;/p&gt;&lt;p&gt;Starting from design specifications such as inductance, quality factor and frequency, designers can use Virtuoso PCD to automatically generate the optimum inductive device for their specific application and process technology, resulting in higher performance and smaller area. A built-in accurate 3D full wave solver is used to verify the generated devices, eliminating the need for a dedicated inductor characterization run and reducing the design turn-around-time.&lt;/p&gt;&lt;p&gt;Virtuoso PCD is easy to use and does not require electromagnetic expertise. The output is a complete PDK component with a symbol, schematic, layout and a simulation model. The built-in modeling capability converts S-parameter files into physical lumped element models, ready for RF analysis using Virtuoso Spectre Simulator XL and GXL. Virtuoso PCD also includes a fast and accurate coupling analysis capability enabling designers to optimize the placement of inductors and transformers on the layout resulting in smaller Silicon area and higher yield. &lt;/p&gt;&lt;p&gt;Learn more about Virtuoso Passive Component Designer at: &lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;a target="_blank" href="https://www.cadence.com:443/products/rf/passive_component/pages/default.aspx" title="datasheet"&gt;Virtuoso Passive Component Designer&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="http://www.cdnusers.org/Articles/Download/tabid/188/Default.aspx?title=Virtuoso%20Passive%20Component%20Designer%20-%20integral%20part%20in%20Infineon&amp;#39;s%20&amp;quot;Inductor%20on%20Demand&amp;quot;%20Design%20Flow"&gt;Virtuoso Passive Component Designer, integral part of infineon &amp;quot;inductor on demand&amp;quot; design flow&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="https://www.cadence.com:443/cadence/newsroom/press_releases/pages/pr.aspx?xml=041408_tsmc"&gt;Key RF technologies from Cadence qualified for TSMC 65-nanometer node&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a target="_blank" href="https://www.cadence.com:443/cadence/newsroom/press_releases/pages/pr.aspx?xml=111207_vpcd"&gt;Cadence announces new RF technology to ease design of&amp;nbsp;nanometer wireless chips&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10179" width="1" height="1"&gt;</content><author><name>Hany</name><uri>http://www.cadence.com/Community/members/Hany.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="Circuit design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Circuit+design/default.aspx" /><category term="RF Block Simulation" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+Block+Simulation/default.aspx" /><category term="Virtuoso Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre/default.aspx" /><category term="wireless integrated circuit verification" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/wireless+integrated+circuit+verification/default.aspx" /><category term="Virtuoso Passive Component Designer" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Passive+Component+Designer/default.aspx" /><category term="Virtuoso PCD" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+PCD/default.aspx" /><category term="Virtuoso Spectre Simulator GXL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+GXL/default.aspx" /><category term="Spectre" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre/default.aspx" /><category term="Spectre RF" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Spectre+RF/default.aspx" /><category term="Virtuoso Spectre Simulator XL" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Virtuoso+Spectre+Simulator+XL/default.aspx" /></entry><entry><title>Senrinotabi</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/07/11/senrinotabi.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/07/11/senrinotabi.aspx</id><published>2008-07-12T04:54:00Z</published><updated>2008-07-12T04:54:00Z</updated><content type="html">&lt;p style="margin:0in 0in 0pt;" class="MsoNormal"&gt;Greetings! My name is Art Schaldenbrand and I have been at Cadence for 12 years supporting the custom IC design tools in the Virtuoso platform. My interests tend to be as widely varied as the customers I work with, ranging from Wireless Design to CMOS Image Sensor design and Power Management design. &lt;br /&gt;&lt;br /&gt;One common theme that comes up when talking to customers about any aspect of design is the challenge of using simulation to understand their design, from creating testbenches to measuring circuit parameters. &lt;br /&gt;&lt;br /&gt;In subsequent appends, I would like to discuss these issues and share ideas with you about how to use simulation more effectively.&lt;br /&gt;&lt;br /&gt;- Art&lt;/p&gt;&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10133" width="1" height="1"&gt;</content><author><name>Art3</name><uri>http://www.cadence.com/Community/members/Art3.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /></entry><entry><title>Cadence, the new kid on the Electromagnetic Solver Block</title><link rel="alternate" type="text/html" href="http://www.cadence.com/Community/blogs/rf/archive/2008/07/11/cadence-the-new-kid-on-the-electromagnetic-solver-block.aspx" /><id>http://www.cadence.com/Community/blogs/rf/archive/2008/07/11/cadence-the-new-kid-on-the-electromagnetic-solver-block.aspx</id><published>2008-07-11T15:57:00Z</published><updated>2008-07-11T15:57:00Z</updated><content type="html">&lt;p&gt;On June 16 2008, Cadence&amp;nbsp;introduced a new Electromagnetic (EM) solver technology to address the challenges of verifying wireless integrated circuits implemented in advanced CMOS process nodes. You can &lt;a href="http://www.cadence.com/cadence/newsroom/press_releases/Pages/pr.aspx?xml=061608_complete_rf_solution" target="_blank"&gt;read the press release here&lt;/a&gt;.&lt;/p&gt;&lt;p&gt;How is this going to help the RF designer?&amp;nbsp; &lt;a href="http://www.cadence.com/products/rf/rf_designer/pages/default.aspx"&gt;Virtuoso&amp;reg; RF Designer&lt;/a&gt; brings a fast planar 3D EM solver to the designer&amp;#39;s desktop. With its NlogN speed (where N is the number of unknowns), higher capacity, parallel and adaptive frequency sweep, and tighter integration inside the Cadence Virtuoso&amp;reg; environment, Virtuoso RF Designer makes EM simulation an integral part of the RF IC design flow, as opposed to a stand-alone step.&lt;/p&gt;
&lt;p&gt;Virtuoso RF Designer integrates seamlessly into the Virtuoso front-end and leverages Cadence&amp;#39;s patented electromagnetic analysis technology to accelerate and accommodate large designs found in today&amp;#39;s RFICs, PCBs, and SiPs. It&amp;#39;s accuracy has been benchmarked over the last several years by comparing with measurement data from TSMC, IBM, Jazz, and other captive foundries.&lt;/p&gt;
&lt;p&gt;Questions or comments? Let me know!&lt;/p&gt;
&lt;img src="http://www.cadence.com/Community/aggbug.aspx?PostID=10144" width="1" height="1"&gt;</content><author><name>Kabir</name><uri>http://www.cadence.com/Community/members/Kabir.aspx</uri></author><category term="RF design" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+design/default.aspx" /><category term="wireless integrated circuit verification" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/wireless+integrated+circuit+verification/default.aspx" /><category term="RF designer" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/RF+designer/default.aspx" /><category term="Electromagnetic (EM)" scheme="http://www.cadence.com/Community/blogs/rf/archive/tags/Electromagnetic+_2800_EM_2900_/default.aspx" /></entry></feed>
