Recently there was an inquiry about the methodology for performing the ft (transition frequency) versus Ic measurement described in my Measuring Transistor ft blog post from July 2008:
By bid75 on September 8, 2010
I am unable to understand how ft vs. Ic plot is generated. How do you do a nested sweep of dc bias current and ac analysis to determine ft at each bias current?
Initially, I was just going to fire off a quick response. However, after thinking about the question, it seemed like a topic that needed to be explored in more detail. So you are going to get this appended posting (and a really cool title). In answer to the question, the tool that performs the nested sweep is the parametric analysis in Virtuoso Analog Design Environment -- specifically, it's a feature of ADE-L. I think that parametric analysis is a useful tool and hopefully after reading this posting you will too. In this case, parametric analysis will be used to perform a nested sweep, sweeping the ft measurement across bias current. Remember that the ft measurement includes a frequency sweep. Parametric analysis is also useful for performing a what-if analysis to better understand design trade-offs. To enable parametric analysis in ADE, select Tools --> Parametric Analysis ... and the Parametric Analysis window will open, assuming you are using the Wilson current mirror based testbench.
1) Select the variable to sweep, ICE
2) Select the variable sweep, from X A [1µA] to Y A [10mA] with Z  steps / decade
Note: You will need to adjust the range based on the device that you are analyzing
3) To run the analysis, click on the green arrow
4) When the simulation is complete plot the results, ft and Ic
Note: You will need to change the X-axis variable from the swept variable ICE to collector current, Ic
Figure 1: Parametric Analysis Setup
Measuring ft is a simple application of parametric analysis. Next, let's look at some other applications. First, we will look at one common challenge designers face as power supply voltages scale down -- understanding the input common mode range of their designs. Different people have different figures of merit for the input common mode range of an operational amplifier. Here we will define the input common-mode range as the input common levels that the dc (maximum) value of the open-loop gain falls by 3dB from the peak value (see figure 2). Parametric analysis makes it easy to visualize the input common-mode range of the amplifier. Not only can we measure the values, we also get a qualitative feel for the how much margin we have before the amplifier fails.
Figure 2: Parametric Analysis Results for Input Common-Mode Range
Lastly, we will apply parametric analysis to a more complex measurement. Suppose that you would like to understand the limits of the dynamic performance of an A/D Converter-- for example, measure the Effective Resolution Bandwidth, ERBW. The Effective Resolution Bandwidth is the input frequency at which the SINAD at full scale falls by 3dB compared to the SINAD at dc. It is a useful figure of merit to measure the conversion bandwidth of an A/D Converter. Shown in figure 3 is an example of simulating the Effective Resolution Bandwidth of a five bit A/D Converter. By nesting this sweep inside of other sweeps, we can analyze the effect of circuit operating conditions on circuit performance -- for example, the effect of power supply voltage or temperature variations on the bandwidth of an A/D Converter. One comment is that you need to properly parameterize your testbench and the appropriate sweep variable when using parametric analysis. We will save the discussion of how to properly parameterize a testbench for another posting. Figure 3: Flash ADC SINAD as a function of frequency
So the summary is that you can use parametric analysis to perform the nested sweep for analyzing ft. However, as we have discussed, there are many other applications of parametric analysis. Hope this posting was useful. As always, please let me know if you have any questions or comments!