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OrbitIO/SIP-XL Co-Design Flow Highlighted at CDNLive SV 2014

Comments(0)Filed under: CDNLive, SiP, IC package design, Co-Design, OrbitIO, DDR interface

The Cadence user group event in Silicon Valley, CDNLive SV 2014, had a number of different focused topic tracks at the event. (See the complete two-day agenda.)

Track 6, IC Packaging/SI, PI, featured customer papers on co-design as well as signal and power integrity. With the growing challenges of planning and implementing the latest generation of multi-gigabit parallel bus interfaces like DDR3 or DDR4, it's easy to understand the emphasis on cross-fabric interconnect planning to optimize for performance and cost.

OrbitIO was featured for early cross-fabric planning in two of the papers with the third session providing a live demonstration of the flow between OrbitIO and SIP-XL.

The first user paper that highlighted OrbitIO was delivered by Dr. WangJin Chen of Faraday Technology. Dr. Chen discussed optimizing interconnect across the die, package, and PCB, and presented a case study illustrating a reduction in layer count, single layer implementation of DDR interface, and an overall reduction in cycle-time as result of using OrbitIO. To review the Faraday Technology paper, click the image below.

 

The second user paper highlighting OrbitIO, delivered by Vincent Hool of Altera, presented a template-based methodology for bump pattern development for FPGAs. It presented their flow and application of OrbitIO from early architectural "what-if" planning, through feasibility analysis, and die abstract data exchange with SIP-XL for final implementation. To review the Altera paper, click the image below.

OrbitIO Altera

The final session was a live demonstration by Cadence Principal Application Engineer Joshua Luo, which showed OrbitIO working in conjunction with SIP-XL and Encounter as part of a seamless co-design solution. He showed how the package definition and route plan generated in OrbitIO is passed via direct integration to SIP-XL. He then utilized auto-interactive breakout technology to quickly implement the interfaces. Luo also showed how the die abstract file is used to exchange silicon-related content with Encounter in support of bi-directional engineering changes throughout the planning and implementation process.

So, CDNLive SV 2014 is behind us, but there will be many more CDNLive events around the globe as the 2014 continues. If you did not make it to CDNLive SV 2014, we hope you can make it to a future CDNLive event.

TeamAllegro

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