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What's Good About FSP’s Allegro PCB Editor Board Import? 16.6 Has It!

Comments(0)Filed under: PCB Layout and routing, PCB design, SPB, Allegro PCB Editor, Allegro, FPGA: PCB, PCB Editor, FPGA, FPGA-PCB Co-Design, FPGA System Planner, FSP, PCB, Taray, layout, "PCB design", design, FPGAs, Grzenia, Allegro 16.6, 16.6, Cadence, Cadence Design Systems

The Allegro FPGA System Planner (FSP) has the ability in the 16.6 release to import Allegro PCB Editor .brd file contents.

Read on for all the great details …

To import an Allegro design, you must first begin with a blank FSP design, otherwise this menu pick will not even appear in the Tools pull-down. Also, this menu pick does NOT import connectivity. It only imports component placement information and the board outline. It can create dummy rules files on the fly as it imports the board. This functionality places the extracted PCB footprints (using extracta) into a temporary import folder. After the import, it is your responsibility to ensure they are pointing to the actual corporate footprints (although you can continue to use those extracted by FSP):

You can import the board outline, components, or both. The “Import Component Prefixes” column lists components that will be filtered from the import. In this example, any reference designator beginning with “U” will show up on the next step of the wizard while anything beginning with C, D, L, or R will not – i.e., U1 and U_1, and UN will not be filtered, but C, C_1, and CN will be filtered. You can still exclude specific components from the import on the next step of the wizard:

In this step of the wizard you can select which components to import and which to exclude using the far left “Select” column. The “Auto Select Similar Part” checkbox will auto-populate the “Select Component Type”, “Select Symbol”, and “Select Rules” columns for all parts with the same part name. If a part name is not specified, FSP uses the component device type to determine part similarity. You must tell the import routine what types of parts are being imported by selecting FPGA, Interface, or Generic Connector from the drop-down:


If a part is marked as an FPGA, you must point FSP to the FPGA in the FSP library. Click on the “…” in the Select Rules column and use the browser to pick the FPGA. If the Physical Part Table file (PTF) and FSP part mapping data has been set up, the corporate FPGA can also be selected by clicking on the “…” in the Select Symbol column. FSP will then fill in the Select Rules column with the FSP FPGA part number:


You can also select the rules for interfaces, just like you can for an FPGA. But, if the PTF and FSP part mapping data has been set up, the corporate symbol can be selected by clicking on the “…” in the Select Symbol column. FSP will then fill in the Select Rules column with the rules file that it finds automatically:


After selecting the part in the Component Browser, FSP gives you the option of specifying a different rules file (or a specific one if the part has multiple rules files) and/or mapping a file. If the corporate symbol links to the FSP data have already been set up, you can just click on Select on the Select Part form. The end result is that for parts imported in this way, it will be as if they were originally placed into an FSP design using Component Browser. You can also select just the interface’s rules file in the Select Rules column and then later convert the rules part (on the canvas) to a real interface to point FSP to the corporate symbol. The downside here is that FSP must be able to find the footprint before you can edit the rules file:


Once the form has been set up as desired, click Finish. FSP will import the Allegro board, extracting footprint, placement, and board outline data. It will also create dummy rules files for any parts whose rules files have not been specified in the Select Rules field/column. The source of the data to create the dummy rules is the schematic symbol if that has been specified. If not, FSP uses the footprint data to create the dummy rules:


Before proceeding to edit the imported design, the Allegro PCB Editor psmpath and padpath values need to be set correctly. When importing a board, FSP will extract the footprints to a temporary folder. Unless the psmpath and padpath are set to point to that temporary folder or the corporate footprints, you will not be able to edit the rules file (FSP will generate a warning that it cannot locate the footprint and it will not let you edit the rules):


Any imported parts for which FSP is unable to determine the location of the schematic symbol will be nothing but rules files, and FSP will not know that they are real parts. To convert them to real parts, click on Convert to Real Interface… and point FSP to the corporate part via Component Browser. For an FPGA, use RMB and select Link to Schematic Symbol… If the rules file is not specified during import, FSP will build a rules file on-the-fly. It is the designer’s responsibility to either change the part to use the real rules file (via RMB -> Rules -> Change -> Select Other Rules File…) or to edit and finalize the temporary, on-the-fly rules file and save it in a better location:


There are a couple of other features in the import board wizard. The wizard can also display the Allegro PCB Editor .dra (JEDEC type) and Component Device Type after it reads the board file (from the previous step of the wizard). These two columns are turned off by default. After getting this form set up, you can export the settings and import them later if needed:


Please share your experiences using these new 16.6 capabilties.

Jerry “GenPart” Grzenia


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