will be under maintenance from Friday, Oct. 3rd at 6pm (PST) thru Sunday, Oct 5th at 11pm (PST). login, registration, community posting and commenting functionalities will be disabled.
Home > Community > Blogs > PCB Design > customer support recommended pin swapping in allegro design entry cis and pcb editor flow
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the PCB Design blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Customer Support Recommended – Pin Swapping in Allegro Design Entry CIS and PCB Editor

Comments(4)Filed under: Capture CIS, Allegro PCB Editor, OrCAD Capture, OrCAD PCB Editor, SPB16.2, OrCAD, Schematic, Capture-CIS, Allegro 16.2, SPB 16.3, Allegro 16.3, Design Entry, Allegro Design Entry, Design Entry CIS, PCB Capture, "PCB design", "capture CIS", SPB16.3, Library, routing, SPB16.5, Allegro 16.5, OrCAD Capture Marketplace, PCB design", 16.5, Capture, application note, customer support, Appnote, Allegro 16.6, 16.6, net swap, pin swap, swap, pinswap

Placement and routing have always been an integral part of printed circuit board design. The productivity of the product is often (if not always) achieved best if the PCB has a proper placement of the components and effective routing to support the placement. With the increased complexity of the designs and smaller board sizes, routing of signals has become more challenging. Designers are always looking for ways to ease routing complexity and hence reduce the turnaround time.

Due to various critical routing situations like differential pairs, bus routings, and critical nets, PCB designers may seek the possibility of pin/net swapping at different levels and at different stages of the design flow. In the Cadence PCB flow, there are fast and easy ways to perform pin swapping, gate swapping and package swapping, all of which help designers ease the routing on the board and synchronize the changes with the schematic. This blog post describes the swapping techniques used in the Cadence PCB Flow using Allegro Design Entry CIS (DECIS) as front-end and Allegro PCB Editor as back-end software.

At a broad level there are 2 steps required to do the swapping:

      1. Preparing the schematic and library for pin swapping.

      2. Perform the required swapping on the PCB Board file.

Preparing the schematic & library for pin swapping

  • Specify the swap properties on the pins of the component to be enabled for swapping.

 Fig 1. Package properties dialog box showing PinGroup assignment.

Specify a unique number in the PinGroup column for specific pins you want to swap within the gate/function.  Only pins with the same value of PinGroup can only be swapped. For example, if all input pins are allowed to be swapped, specify a value of 1 to all input pins and 2 to all output pins for the PinGroup property, as shown in Fig 2.

  • If you are working with a split part (multi-section part) and wish to swap the pins across slots/sections, you need to have a property called SWAP_INFO specified on each of the sections as shown in the below picture:

Fig 2. User Properties dialog box at Library level

As per the above example, you are allowed to swap the pins across all 4 sections. If you want to restrict the pin swapping across some sections only, the value of SWAP_INFO should be changed accordingly. For e.g.: SWAP_INFO = (S1+S2),(S3+S4) will allow pin swapping between section 1 (S1) & section 2 (S2) and not with the other 2 sections (i.e. S3 and S4). Similarly, Pins between section 3 (S3) & section 4 (S4) can only be swapped within the 2 sections.

NOTE: Pins with the same pin group property can only be swapped among themselves.  
  •  Generate the Allegro netlist by choosing Tools > Create Netlist > PCB Editor (tab) from OrCAD Capture


Fig 3. Create Netlist Dialog Box

  •  Create the board automatically by checking the option "Create or Update PCB Editor Board (NETREV)" from the above UI.

Note: If you do not generate the board file during netlist creation, you could import the schematic logic to Allegro PCB Editor using the option File > Import > Logic command from within the PCB Editor.

Pin Swapping in Allegro PCB Editor   
  • Once the schematic netlist is imported in Allegro PCB Editor board file, place the components on the board file and notice the unrouted connections.
  • To swap the pins on the board file, select Place > Swap > Pins



Fig 4. Pin Swap command in PCB Editor   


a. Select the pin on the footprint that needs to be swapped.

b. PCB Editor highlights the other available pins that can be swapped with the selected pin (from step #a). If no pins are highlighted, read the command window at the bottom for an appropriate message.

c. Select the pin from the highlighted group. Right Click > Done, to complete the swap operation.                                               



Fig 5. All swappable pins are highlighted in PCB Editor

Refer to the complete AppNote for a detailed procedure about each of the steps involved in the process and also to learn more about the following:

  • BackAnnotate the swapping information (updated netlist) to the schematic and get the schematic in sync with the board file.
  • Some important aspects of the gate/function swap and component swaps.
  • Generating a swap report. 
Note: The above link can only be accessed by Cadence customers who have valid login credentials for Cadence Online Support (


By Cyber Genius on March 30, 2013
To make pins swappable, go to the schematic in Capture, left click on the logic gate you want to make swappable, go to the  Edit menu and select  Part. The part editor will be displayed. In the part editor select  View → Package from the menu bar. You will see all the gates in the work space. Now select Edit → Properties from the menu bar to display the Package Properties spreadsheet

By KARTHIKEYAN.K on April 24, 2014
how can i enable the pin swap option in concept hdl?

By Hossein1357 on August 22, 2014
I have tried pin swap but it didn't work. Although, I defined a PinGroup for my device pins in schematic and gave them a positive value it doesn't work in PCB editor. I always receive below message:
Pin is not swappable because the swap code is zero ... pick again.

By Naveen on September 3, 2014
@Hossein1357, Did you package the schematic after adding the PinGroup properties? The PinGroup properties needs to be transferred to the netlist and then the netlist should be re-imported into the brd file. If you still see the issue, kindly generate a case from and one of the AEs will work with you.  
Naveen Konchada

Leave a Comment

E-mail (will not be published)
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.