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What's Good About HDI Via Structures - Check out the SPB16.2 Release and See!

Comments(9)Filed under: PCB design, SPB 16.2, LMB, via, microviaNew functionality has been added to the SPB16.2 Allegro PCB Editor suite of tools to support micro vias as distinct design elements.

This introduces a new methodology to add both conventional and HDI via structures. It includes a new ‘working layer’ model and associated via popup GUI designed to automate the sequence of layer transitions using stacked, staggered and inset vias. We'll cover:
  • Add Via Overview
  • Working Layer Model
  • Via Pop GUI
  • Ordered Via List
  • Adding HDI vias
Definition of a microvia - A blind or buried hole that is less than or equal to .15 mm or 5.91 mils in diameter having a pad diameter that is less than .35mm or 13.8 mils formed by laser or mechanical drilling, wet/dry etching, photo imaging or conductive ink-formation followed by a plating operation.

Add Via Overview

Interactive routing in Allegro is built on the model of active and alternate layer pairs. Its efficiency is limited to 2 layer routing strategies. Changing the alternate layer during routing requires mouse travel to the options panel where a new destination layer and/or via selection is made. Function keys can be mapped to the alt subclass commands in lieu of the mouse travel to the options panel. A new model based on the concept of multiple alternate layers is introduced in 16.2. The ‘Working Layer’ model, in combination with a new Via Popup GUI, localizes the steps of layer transition near the point of occurrence. Upon a LMB double-click in the canvas, a GUI appears displaying a list of layers enabled in the ‘Working Layers’ dialog. A single click on any one of the layers closes the form and adds the vias as determined by the ordering in the Physical CSet. On advanced technology boards such as Type III HDI or ones utilizing Any Layer vias, the new add via model automatically adds a coincident series of stacked vias in just one mouse click or through semi-automatic means, a staggered sequence of vias placed at the minimum same net clearance rules for the respective via types of the structure.

Working Layer Model

The new ‘Working Layer’ concept is an alternative, not replacement for the legacy active/alternative editing model. While in the Add Connect command, the selection of the drop down choice ‘WL’ enables the environment. From there, a Working Layers dialog controls the layers that appear in the Via Popup GUI. The enabling of all layers in the dialog results in a full size Via Popup GUI. On high layer count boards, the list may become too long to efficiently work with, hence enabling a subset of layers, those known to be probable candidates for layer transitions, is recommended. The following example outlines the flow for using the ‘Working Layer’ mode:

1. While in Add Connect command, select WL from pull-down.

2. Click the ‘Working Layer’ button then enable all layers; close form.


3. When in Add Connect, a double click with the LMB produces the fully populated Via Popup GUI with the Active layer dimmed. Selecting a layer in the GUI adds the via and closes form.



4. ‘Working Layer’ dialog opened, 5 layers are disabled.

5. A double click during Add Connect produces a shortened GUI with 2 layers available to via to.

Working Layer Dialog

With the Add Connect command active, you can access the Working Layer dialog from the:
  • Options Panel (right side of canvas)
  • RMB — Working Layers menu selection
The color swatches that appear in the form align with the colors used for the ETCH subclasses. Plane layer display is an available option. When enabled it appends all layers classified as PLANE to the list. Be default, Plane layer display is disabled since it’s uncommon to route on them

Layer Set Identification

It is not necessary to keep the Working Layer form open during routing however the following behavior should be noted when routing nets constrained by Layer Set rules. The first column of the dialog is reserved for LS (Layer Set) identification. Similar to the bolding of layers in the legacy add via model, LS appears adjacent to all layers of the Layer Set definition. These layers will become temporarily enabled if in a disabled state.


 

Via Popup GUI

When the ‘Working Layer’ Mode is enabled, a LMB double-click produces a Via Popup GUI at about the location of the via to be inserted. The layers that populate the GUI are driven from the ‘Working Layer’ setup form with the Active layer always dimmed out. When only 2 layers are enabled, a LMB double-click adds the via without GUI intervention. This emulates the legacy Active/Alternate model. The via(s) inserted are driven by the ordering in the respective Physical CSets. This discussed more in the next section. The ellipse buttons on the right side of the form provide access to alternate or least preferred vias based on the ordering within the CSet. One of the major benefits of the new model is the ability to automatically add sequential B/B vias on the path to the destination layer. If stacking rules are permitted, each via of the stack is added at a coincident location. If stacking is not permitted and staggering rules prevail, each via of the sequence is floated on your cursor spiraling around the previously instantiated via at 22.5 degree increments with respect to the same net spacing rule between the 2 via types.

Ordered Via List

It’s common to have preferred and alternative vias associated with many nets that comprise the design. Prior to 16.2, the vias associated with the path from Active to Alternate layer populate the via list but with no special consideration for what is most used (preferred) or least used (alternative). An example application utilizing an alternate via is with HDI where the priority for most signal transitions through the layers is with Micro and Core vias however a thru-via is present in the via list for special circumstances.
  • The concept of an ordered via list is to provide a default condition, one that is predictable, when adding a single or sequence of vias through the board. The Via List represents the selectable order of vias used by certain manual and auto routing commands like add connect. The via order allows an application to automatically select the first via, or sequence of vias, in the list that meets the desired layer-span. The following guidelines are suggested when working with Via Lists:
  • When Microvias and/or B/B-vias are preferred over thru-vias, they should be listed first in the Via List.
  • Each CSet should contain a complete Via List. Vias are not inherited across CSets.
  • Any via listed after a thru-hole will not be preferred, since if the thru-hole appears first, it can achieve any start/stop combination.
  • Vias are often listed in the order of the cross-section, but this is not mandatory.
  • A via will not have priority if its layer-span is achieved by one or more vias listed earlier in the Via List. (ex BB1-2, BB2-3, BBSkip1-3; BBSkip1-3 is not preferred as the path from 1-3 is achieved by the first two vias in the list)
  • Vias that are not preferred can still be added from the Via Popup GUI, though it requires extra mouse picks.
  • The drill direction (Up or Down through the cross-section) does not matter. The vias chosen from the Via List will be the same.
  • Where different Regions require different Via Lists, it is recommended to create new and customized CSets as required. The Region object supports its own Via List.



Example using the Via List in the above graphic, a signal is being routed on Layer Top.
  • A LMB double click produces the Via Pop GUI shown below.
  • Signal_3 is selected from the list and the via form closes.
  • BB1-2 is inserted at pick point; BB2-3 via spirals around BB1-2 @ 22.5 degree increments.

 




Using the same example, instead of selecting Signal_3, the ellipse button (...) adjacent to it is selected producing the list of alternate vias to choose from. Selection of either via from the list closes the form and adds the via.

Adding HDI Vias

The new add via model is designed to increase the efficiency of adding HDI vias of the following structure types:
  • Staggered
  • Stacked Microvias/Offset Core Via
  • Stacked Microvia & Core Via
  • Inset Vias (Overlapping of vias)
  • Any Layer Via
The add via model is based on the selection of the destination layer in combination with the appropriate Physical CSet driven ordered Via List. In the examples below, a transition is made from Layer Top to Bottom.

Example 1 - Adding Staggered Vias

The following vias are used in the sequence (BB1-2, BB2-3, BB3-6, BB6-7, BB7-8). All but BB3-6 are classified as Microvias. Since all of these vias are on the same net they are controlled by the Same Net spacing constraint.
  • While routing on Layer Top (1), a LMB double-click produces the Via Popup GUI where Layer Bottom (8) is selected
  • BB1-2 via is inserted at the pick location; BB2-3 is floating on the cursor.
  • Remaining vias are semi-automatically added where user has control of location about the previously inserted via.
  • Rotation angle about previously inserted via is 22.5 degrees.
  • Use the CNTL key to go into free angle mode if desired.
  • Separation of vias is controlled by the Same Net rules for Microvia to Microvia (0 mils) and Microvia to BB Via (5 mils).

 


Example 2 - Adding Stacked Microvias

Similar to Example 1, the following vias are used in sequence (BB1-2, BB2-3, BB3-6, BB6-7, BB7-8) however in this example, rules permit the stacking of BB1-2 to BB2-3 and BB6-7 to BB7-8. The Core via (BB3-6) is offset from the stacked vias.
  • While routing on Layer Top (1), a LMB double-click produces the Via Popup GUI where Layer Bottom (8) is selected
  • Both BB1-2 and BB2-3 vias are inserted coincidently (at same x,y location) at the pick location; BB3-6 via is now floating on cursor.
  • Physical CSet rules to allow stacking include:
    • Min BB Stagger set to 0
    • Allow Pad to Pad Connect set to Vias_Vias_only on Layers Signal_2 and Signal_7.
  • Label associated with stack provides guidance that more than 1 set of B/B vias are stacked (label 1-3).
  • BB3-6 separation from the stacked Microvias is controlled by the Same Net Microvia to BB Via rule of 5 mils.
  • 1 LMB pick inserts BB3-6 via; BB 6-7 and BB7-8 (stacked formation) floating on cursor, separation to BB3-6 controlled by Same Net Microvia to BB Via rule of 5 mils.
  • 1 LMB pick inserts both BB6-7 and BB7-8 at the pick location.
  • The slide command treats the stacked vias as a single entity. Use the RMB — Split Stack command to slide a specific via of the stack.



Example 3 - Adding Stacked Micro/Core Vias The following vias are used in sequence (BB1-2, BB2-3, BB3-6, BB6-7, BB7-8) however in this example, rules permit the stacking of all via types.
  • While routing on Layer Top (1), a LMB double-click produces the Via Popup GUI where Layer Bottom (8) is selected.
  • The entire set of vias are inserted at the pick point.
  • The via label is indicative of the complete stacked series of vias (1-8)
  • Physical CSet rules to allow stacking include:
    • Min BB Stagger set to 0
    • Allow Pad to Pad Connect set to Vias_Vias_only on all layers except Top and Bottom where settings support Via-in_Pad.
  • The slide command treats the stacked vias as a single entity. Use the RMB — Split Stack command to slide a specific via of the stack.



 

Example 4 - Adding Inset Vias

The following vias are used in sequence (BB1-2, BB2-3, BB3-6, BB6-7, BB7-8) however in this example, rules permit the overlapping of adjacent vias.
  • While routing on Layer Top (1), a LMB double-click produces the Via Popup GUI where Layer Bottom (8) is selected.
  • BB1-2 is inserted at the pick location; BB2-3 floating on cursor overlapping BB1-2.
  • Separation of vias is controlled by the Same Net rule of -1 between via types in combination of Via to Hole rule set to 0. It’s the Via to Hole rule that controls the separation between the edge of the via pad and edge of hole.
  • The Via to Hole constraint of 0 allows the tangent condition between the vias (pad edge to hole edge)
  • The -1 entry bypasses the same net check in favor of the Via to Hole check. If not for the -1 entry, a same net v-v DRC would be produced by the overlap.
  • Remaining vias are added sequentially

 

Example 5 - Adding "Any layer Vias"

The lamination of conductive areas on each layer to conductive areas on the adjacent layers is commonly referred to as "Any Layer Via" construction. This technology is primarily used on small consumer electronic products like cell phones to meet high density routing and board thickness requirements.
The following vias are used to transition to any layer (BB1-2, BB2-3, BB3-4, BB4-5, BB6-7, BB7-8).
  • While routing on Layer Top (1), a LMB double-click produces the Via Popup GUI where Layer Bottom (8) is selected.
  • The entire range of vias is inserted at the pick point.
  • From the Bottom layer, a LMB double-click to Signal_4 is made; the entire stack between this span is added. The via label is indicative of the complete stacked series of vias (4-8)
  • Physical CSet rules to allow stacking include:
    • Min BB Stagger set to 0
    • Allow Pad to Pad Connect set to Vias_Vias_only on all layers except Top and Bottom where settings support Via-in_Pad.
  • The slide command treats the stacked vias as a single entity. Use the RMB — Split Stack command to slide a specific via of the stack.
     

 

I'm interested in hearing from those PCB designers who will be using these new HDI via capabilities.Jerry GenPart

Comments(9)

By Ole Ejlersen on November 12, 2008
Seems there is a problem with the pictures - looks like they point to an internal location instead of cadence.com

By Jerry GenPart on November 12, 2008
Sorry about that - the pics should appear now. Jerry Genpart

By girish on November 12, 2008
Good artical , but not possible to view the images  could you pls. forward this document in pdf format or how i can view . This will help me more  RegarsGirish

By Jerry GenPart on November 13, 2008
I hope everyone can view the images in the article - I've made some adjustments. If not please let me know. Jerry GenPart.

By Ted on January 11, 2010
how do you turn on the via stack information on the vias?  ex.. 1-2, 3-6, etc...


By Jerry GenPart on January 11, 2010
Hi Ted,
To turn on the via stack information, go to Setup> Design Parameters> Display and turn on "Via Labels".
Jerry

By Ted on January 12, 2010
Jerry,
I'm able to access that option in the viewer but not the editor (16.2).  I can open a board in the viewer and i'm able to toggle that switch but when I open the same board in the editor that button is greyed out.  The viewer shows the via label but the editor does not.
thanks  

By Jerry GenPart on January 12, 2010
Hi Ted,
This is getting a bit more in depth than my Allegro PCB Editor knowledge (my expertise is the front-end SPB products).
May I ask that you file a new Service Request via Cadence Online Support - http://support.cadence.com/.
Jerry

By Jerry GenPart on January 12, 2010
Hi Ted,

I've forwarded your Email contact to one of our Allegro PCB Editor Support AE experts. He'll be contacting you regarding this. Perhaps you may not have any vias punched in the design or none that apply to a layer pairing. I think it only addresses Blind and Buried vias that are in a layer stack.

Jerry G.


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