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ERC in Assura

Comments(1)Filed under: Silicon Signoff and Verification, Assura, ERC

A few customers have recently asked whether we can provide schematic-based ERC checks.  This is no doubt spurred by a recent product announcement by one of our competitors.  No - I'm not going to say who, and I'm not going to provide a link to their product page. 

We have had layout-based ERC checks as part of our Assura physical verification product since release 3.2 became available last August.  A quick check with our field AEs revealed that it's also possible to use Assura for ERC checks based on netlists and schematics, as well as layouts.  One of our AEs has put some instructions together, and it actually looks pretty easy.  Ask your friendly Cadence physical verification expert for a copy of the document, and tell them to send out an email on the Cadence internal Assura AE email alias if they can't find it right away.  While you're at it, ask about the 10x performance improvement that we made in Assura 3.2. 

It's interesting that our competitor has made a separate product from this when we give it away for free with Assura.  Marketing, I guess. 

Comments(1)

By Ankur on March 12, 2010
There is an Application Note available on COS explaining Assura ERC flow.

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