Home > Community > Blogs > Low Power > low power IEEE 1801 upf simulation rapid adoption kit
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Low Power blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Low-Power IEEE 1801 / UPF Simulation Rapid Adoption Kit Now Available

Comments(0)Filed under: low-power, low power, UPF, simulation, IES, IEEE 1801, IEEE 1801-2009, Functional Verification, RAK, RAKs, Incisive, Incisive Enterprise Simulator, UPF 2.1, IEEE 1801-2013, 1801

There is no better way other than a self-help training kit -- (rapid adoption kit, or RAK) -- to demonstrate the Incisive Enterprise Simulator's IEEE 1801 / UPF low-power features and its usage. The features include:

  • Unique SimVision debugging 
  • Patent-pending power supply network visualization and debugging
  • Tcl extensions for LP debugging
  • Support for Liberty file power description
  • Standby mode support
  • Support for Verilog, VHDL, and mixed language
  • Automatic understanding of complex feedthroughs
  • Replay of initial blocks
  • ‘x' corruption for integers and enumerated types
  • Automatic understanding of loop variables
  • Automatic support for analog interconnections

 

Mickey Rodriguez, AVS Staff Solutions Engineer has developed a low power UPF-based RAK, which is now available on Cadence Online Support for you to download.

  • This rapid adoption kit illustrates Incisive Enterprise Simulator (IES) support for the IEEE 1801 power intent standard. 

Patent-Pending Power Supply Network Browser. (Only available with the LP option to IES)

  • In addition to an overview of IES features, SimVision and Tcl debug features, a lab is provided to give the user an opportunity to try these out.

The complete RAK and associated overview presentation can be downloaded from our SoC and Functional Verification RAK page:

Rapid Adoption Kits

Overview

RAK Database

Introduction to IEEE-1801 Low Power Simulation

View

Download (2.3 MB)

 

We are covering the following technologies through our RAKs at this moment:

Synthesis, Test and Verification flow
Encounter Digital Implementation (EDI) System and Sign-off Flow
Virtuoso Custom IC and Sign-off Flow
Silicon-Package-Board Design
Verification IP
SOC and IP level Functional Verification
System level verification and validation with Palladium XP

Please visit http://support.cadence.com/raks to download your copy of RAK.

We will continue to provide self-help content on Cadence Online Support, your 24/7 partner for learning more about Cadence tools, technologies, and methodologies as well as getting help in resolving issues related to Cadence software. If you are signed up for e-mail notifications, you're likely to notice new solutions, application notes (technical papers), videos, manuals, etc.

Note: To access the above documents, click a link and use your Cadence credentials to log on to the Cadence Online Support http://support.cadence.com website.

Happy Learning!

Sumeet Aggarwal and Adam Sherer

Comments(0)

Leave a Comment


Name
E-mail (will not be published)
Comment
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.