This posting is part of a series of blogs on dynamic power
management in digital-centric mixed-signal verification environments. In this
post, I'll discuss the simulation of closed-loop voltage scaling for adaptive
dynamic voltage and frequency scaling (DVFS).
My previous blogs covered some of the following topics:
1. Basics of dynamic power management
2. Very brief introduction to RNM (Real Number
Modeling) for efficient simulation of mixed signal SoCs
3. How to create a controlled voltage source using a
Specman testbench
4. Closed-loop voltage scaling
Previous postings include:
Simulation of Closed Loop (Adaptive) Voltage scaling
In this example, there are dedicated LDOs: ldo_mcu and
ldo_dsp are modeled as wreal data types, supplying regulated voltage to two
seperate power domains. The operating voltages are defined in the wreal models
of the LDO and individually configured from the verification environment.
Voltage transitions are controlled by the power controller based on estimated
processing needs that are task dependent.
A noisy battery voltage is supplied from the verification
environment and controlled by the test parameters and supplied to the two LDOs.
The LDOs independently regulate the supplied battery voltage to supply nominal
voltages to each independent power domain. There are 5 predefined nominal
voltages for each LDO, and the outputs are independently scaled under control
from the power controller to supply the regulated voltage to each individual
power domain.
Figure 1: Closed Loop
Voltage Scaling
Voltage scaling is orchestrated by controlling the output of
the LDO to supply a targeted nominal voltage independently for each power
domain. Figure
1 shows how closed-loop voltage scaling is performed on
the SoC. The power controller determines the voltage level at which each power
domain needs to operate, and then fine-tunes the supplied voltage based on
feedback from the hardware performance monitors (HPMs) to perform closed-loop
DVFS.
The HPMs are strategically placed inside the SoC and measure
the targeted performance for each design unit. They provide feedback to the
power controller to increase or decrease the operating voltage in real time.
These are also modeled using wreals. The delay parameters and update rates are
programmable and controlled from the verification environment.
The results of simulating adaptive voltage and frequency scaling
are illustrated in Figure
2.
Figure 2: Adaptive Voltage and Frequency
Scaling
In the next blog posting, I will write more about error
detection during voltage scaling.
Stay tuned for more...
Neyaz