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My Wish List For The New Decade

Comments(0)Filed under: Logic Design, eda, metrics, methodology, 4G, Santa Claus

Okay, it's the holiday season and end of the year, so I'll combine it all and make a wish list for the new year (as it relates to chip design). Heck, it's the end of the decade - so why not make a wish list for the new decade?

A decade is a long time in our industry. This year, my 7-year-old asked Santa for a 4G phone (based on clever advertising by Sprint, which obfuscates the fact that their "4G" is just WiMax and they currently only offer modems, no phones yet). A decade ago, the 3G spec was still being developed. The phones today are more powerful compute platforms than the PC I had a decade ago. This has been driven by industrious designers and advances in EDA technology.

I remember a decade ago, the place & route software was just getting the ability to perform optimizations beyond simple buffering and sizing (thanks in large part to the emerging formal equivalence technology). Signal integrity was the new buzzword. Power was not a concern in most designs. And verification - which had just meant "simulation" for the previous decade-plus - was beginning to see new technologies emerge to address more modern challenges. Today we have well-established, metric-based verification methodologies that employ many of the techniques that were emerging back then.

If I look at the way design is done today, there are a lot of parallels to verification in 1999. The general methodology has been largely unchanged for more than a decade. Yet the associated challenges are growing exponentially. Look at the high-profile products that have missed the holiday shopping season this year - that 4G phone, the Nook e-reader (which my wife wanted), the 27-inch iMac, the Nokia N900, etc. This is costly! New technologies have finally emerged in recent years -  global synthesis, low power design techniques, constraint management, usable physical synthesis, automated ECO capabilities, and easy-to-deploy pre-RTL what-if exploration to start your project in the right direction. Perhaps most important has been the emergence of production-ready ESL synthesis. All of these technologies are poised to help address the challenges that designers face today.

So I'm feeling pretty fortunate. But I want more, because "Q1 delivery" does not help Santa during the holiday season. First we need our own schematics-to-RTL jump. RTL was definitely an improvement, but it's still too close to being an implementation of a concept. I want to see designers designing concepts and verifying them in the system context before worrying about how to implement the register-to-register logic. ESL synthesis can finally enable this jump from RTL to actual concept design. The elves rejoice.

But that's not everything - we still need to figure out how to apply all these new techniques in a coherent, repeatable manner. The verification folks have hashed out methodologies that are driven by metrics harvested from all the verification techniques run on the design. This helps speed ramp-up of a project, but more importantly delivers more visibility to the status and hence the agility to quickly make necessary adjustments. This is what really speeds the path to closure, along with the confidence that using this proven methodology will deliver a design that goes predictably through the physical implementation. This is something that we as EDA vendors need to deliver in order to enable that next jump in design capability, to enable true System-on-Chip platform design. This way you can ensure that Santa can get his hands on phones to go along with the network rollout.

The economics of the semiconductor industry have moved from the old days of home-brewed ASICs to mass-production high-stakes parts. And so much more of it now is consumer-driven, which means a more rigid delivery schedule. So this requires adoption of more modern design techniques, more rigid design methodology, and most importantly more analysis that links design decisions to the economic effects on the overall project.

That's all I'm asking for. Is it too much? Will I just receive coal again anyway?

Best holiday wishes to all of you, and I'm looking forward to the new year!

Jack Erickson

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