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How Do Logic Designers Become Rock Stars?

Comments(0)Filed under: logic desgin, Jack Erickson, John Bruggeman, EDA Graffiti, rock stars

Cadence's new Chief Marketing Officer, John Bruggeman just published a guest post over at one of my oft-read blogs, EDA Graffiti. In it he talks about Intel's "rock stars" - our logic design brethren - and how the model of relying on these rock stars to design your chips is no longer sufficient. Integration of IP is now just important as creation of that IP by those rock stars.

This should not offend you rock stars, after all the amount of logic that can fit on a die is growing exponentially, yet our population of logic design rock stars is not. So what happens is that SoC design becomes more and more about integrating internal IP, 3rd party IP, new logic, along with software. This is similar to the evolution of systems design, where everybody used to design their own ASICs, whereas today most systems are built from high-volume ASSPs and the differentiation comes from software, industrial design, etc.

The good news for logic designers is that the IP they create can be leveraged a lot more in this model. From an economic point of view, the suppliers of this IP remain somewhat fixed, while the demand for it increases exponentially. This is the true rock star model. In fact, logic designers today are more like a house band performing brilliant work but not getting broad exposure. The SoC integration model enables them to scale to a much larger demand.

The big question is - how do we get there? How much of your latest project's transistor count comes from new RTL?

So much RTL today is implementation-specific - specific to the application/context where it is used, or designed for a specific power profile, designed to work around limitations of 20-year-old synthesis technology, etc.  At the very least it tends to be process-specific - how much combinational logic can we get through in order to meet timing in this process? So that begs the question - can we even get to the big stage with RTL abstraction, or does logic design need to move up a level of abstraction in order to enable this? What else is required to enable logic designers to achieve rock stardom?


Jack Erickson

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