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When Green Chips Turn Brown

Comments(0)Filed under: Logic Design, incyte, low power design, chip estimate

I went to New York City last weekend and went to see a Broadway show called Avenue Q.  It's a very adult adaption of Sesame Street (sort of).  Before you grab a bus, plane, or train to NYC to see this show with your kids, be forewarned.  Puppets aside, this is NOT a show for children.  And while that has absolutely nothing to do with chip design, it made me think of my favorite frog from my childhood who said "It's not that easy being green".   

As chip designers, we all know how hard it is to build a green chip.  First, there all the implications to implementing a low power design.  Decisions about multi-supply voltage, power shutoff, power aware test, etc, etc, etc.  And never mind all the implications on the design flow.  I'll leave the details to that to another blog and probably another blogger.  Let's assume that you've made all the appropriate decisions up front and have all the right tools and methodologies in place to handle the details.  OK, so why then do so many chips end up not meeting their power budget at the end of the project?  Or worse yet, how many projects have required respins in order to finally meet the power budget?  

I believe that a lot of the problems can be attributed to the fact that most companies don't do a good enough job in tracking their metrics thoughout the design process. Somebody in marketing or senior engineering management comes up with some kind of estimate of the power consumption, usually on some mega-spreadsheet that's been handed down from generation to generation along with secret handshakes, solemn incantations and a few martinis. Everybody agrees that **when** that power budget is met, the project will have a place in the market and customer will beat down their doors to buy millions of parts.  This specification is then sent down to the engineering team to implement.  This is where the problems start.  The engineering team starts working on actually creating this monster and at some point starts to get some feedback on the actual power consumption. Given that performance and area are most likely higher priorities this feedback is likely to get ignored.  Fast forward another 6 months.  The design is in the final stages of layout.  Some poor engineer gets the job of taking a bunch of vectors from simulation, a bunch of parasitic data, and looks at the final power numbers.  Guess what, the power budget has been blown out the window.  And at this point it's probably too late to do anything about it.

 So back to my original question.  When do green chips turn brown?  The reality is that they probably start turning brown very early in the design flow, but nobody bothers to look back at the original assumptions and validates them as the design becomes more real. They wait until way too late in the process to see what affect all the real implementation details are having on the initial power budget.  If we simply look at the metrics on a regular basis, and revalidated and/or changed our assumptions, we might actually have the time to go back and possibly make changes to our design to get things back in line.

 I'm not going to go into a long winded sales pitch in this blog, but I do want those of you reading to know that there is hope, and all you have to do is go to chipestimate.com and look around.  I'm pretty excited about this tool as I see it as way to keep things in synch between the people that come up with the original idea for a chip and us poor slobs that have to make that idea a reality.  Take a look, you can even download a free version.  Let me know what you think.  And show it to your architects, marketing guys, etc. I think they'll eyes will light up just like mine did.

 

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