“Green design” was
one of the main themes at last month’s SAME forum in Sophia Antipolis,
article by Anne-Francoise Pele at EE Times Europe nicely covers the highlights.
I like Ted
Vucurevich’s quote about how power is now inseparable from the other aspects of
chip design. This is really the first step we all need to take – to treat
power just like we treat the other design metrics of performance, cost, functionality,
schedule, etc. So in terms of synthesis optimization, it can’t be an
afterthought or something you try to recover in a post-processing step.
It needs to be considered simultaneously as optimization structures the logic
for timing and area as well.
The other major theme
covered in the article was around power needing to be optimized at the system
level. This was a constant theme from both Ted as well as Jean-Marie
Saint-Paul from Mentor.
For all we do to optimize power during chip design, it’s what is done at the
system level that has a larger effect. Also it can make it either easy or
hard for the chip designers to meet the power goals at that level.
A great example is my
smart phone. For about the first year I owned it, I had to charge it
every night, even if I didn’t take any calls during the day. I assumed
that the issue was hard-wired, that it was just because they packed so much
cool stuff into the design of the phone. Well, I recently upgraded to
Windows Mobile 6.1, and lo and behold the battery life has probably more than
doubled. I can go two nights without charging it, and still get through
half of the third day. Goes to show that power is truly something that
must be addressed from the system-level on down through every aspect of the