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Low Power DDR Options -- From the Trenches

Comments(2)by Marc Greenberg, Director of Technical Marketing, Denali Software
Momentum for LPDDR2 is building. It's mostly in the mobile space, and it's been in the general area of Handsets, MIDs, and other mobile devices. Both high-end and low-end handset customers are seeking LPDDR2 support, which is interesting since LPDDR2 was initially thought to be a high-end technology. Long-term, LPDDR2 devices are expected in a lot of embedded applications where DDR3 is unsuitable for various reasons.

When it comes to building chips today, the LPDDR2 market is still maturing and device availability is just now coming on-line, so chip guys need to hedge their bets by supporting at least one other memory technology, sometimes more.

The first hedge for pure handset folks is an LPDDR2/LPDDR1 combo. This allows them to get into a low-power memory with LPDDR1 or LPDDR2 technology, but the performance for this combo is limited by LPDDR1 which has a maximum clock rate of 200MHz (DDR400) and in reality, 166MHz is the popular frequency for LPDDR1. So, this doesn't work for high-end solutions since they are sacrificing performance or would need to deploy a wider interface.

The second hedge is DDR2. DDR2 makes a nice combo with LPDDR1/LPDDR2 because the IO voltage of DDR2 is 1.8v, same as LPDDR1, so you don't need a different oxide in the IO if you were already supporting 1.8v for LPDDR1. DDR2 is the low-cost memory leader and available up to 533MHz (DDR1066) today. So the LPDDR1/LPDDR2/DDR2 combo has been popular for most of 2009.

Lately, more companies are looking forward at DDR3. DDR3 offers the advantage of a 1.5v I/O and for the most part DDR3 is built on smaller process geometries so uses less power in general. The chart below shows a comparison of different memory technologies at the same throughput. The take-away from this chart is that a 16-bit DDR3 running at 333MHz (DDR667) is about the same power as a 32-bit LPDDR1 running 166MHz(DDR333) so there is equal throughput and similar power usage between DDR3 and LPDDR1.

Click to enlarge

This is not a completely fair comparison -- there are lots of things not considered:
  • SSTL IOs of DDR3 use a lot more power than the LVCMOS pads of LPDDR1;
  • DDR3 needs termination which uses power;
  • Those 16 extra DQ pins (plus 2 DQ and 2DMs) required for LPDDR1 also use power;
  • LPDDR1 can go into a low power mode more often and more easily;
  • LPDDR1 uses less power in standby;
  • etc...

So, let's look at the decision-making process: if I am a high end mobile customer, I need LPDDR2, that much is certain. I probably want to hedge my bets with another memory technology to ensure that I have supply of some memory in case LPDDR2 is expensive or unavailable. If I choose LPDDR1, I need to put down 2X the IO pins for data to get into a part that uses 10% less power than DDR3, remembering that LPDDR1 was first introduced over 6 years ago. Or, I keep the same number of IO pins, use the most mainstream memory for 2010 and beyond (DDR3), and live with 10% more power usage in my memory.

Finally, with mask costs and chip development costs being what they are, everyone has an eye on being able to use their chip in more than one application space. Even if the chipset is primarily mobile, with the projected cost of DDR3 being less cost per bit than DDR2 starting in 2010, DDR3 becomes a "must-have" for new chip designs.


By Santhosh Injineri on August 28, 2012
Nice article. I would like to know if you have any article on Verification/Design of LPDDR1/2/3  Memory Controllers?
Santhosh Injineri

By Marc Greenberg on August 28, 2012
Hi Santhosh, a great way to learn more about LPDDR3 would be to attend the JEDEC LPDDR3 Symposium on October 29th. I will also send you some documents. All the best, Marc

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