Stephen Woo, president of Samsung Electronics, came to the Design Automation Conference (DAC 2013) with what amounted to a wake-up call. While the EDA and semiconductor industries are doing a great job enabling the most exciting applications of our times, and have some "tricks to play" for the next two to three years, "we are not well prepared" for the technology revolution coming down the road in the next three to five years, he said.
Woo's keynote speech, delivered June 4, was titled "New Challenges for Smarter Mobile Devices." It included a look at the evolution of smartphones, starting with the i-mode phone (introduced in Japan in 1999) and, much more recently, the Apple iPhone and Samsung Galaxy phones. This year, Woo said, smartphones will offer full HD resolution, and high-end smartphone cameras will provide up to 13 megapixels.
And yet, he noted, if you take a smartphone apart, you will find a big battery—and a pc-board with about 1,000 components. "We still have to use more than a dozen chips and many passive components to build a phone," Woo said.
The demand for newer and better smartphone applications leads to three engineering challenges, Woo said. These challenges, and their current solutions, are as follows:
- Space: Form factor can be reduced by moving to lower process nodes, and potentially by 3D integration.
- Applications: New apps demand a lot of processing power, which is now provided by dual-core, quad-core, and even 8-core processors. Software developers originally resisted multi-core processors, but these are expected now.
- Battery and Heat: The EDA community has developed many useful low-power technologies, such as dynamic frequency and voltage scaling (DFVS). Further power reductions can be found through hardware/software integration. Thermal-aware design tools are available.
Going forward, how are we going to address new applications and new requirements? Woo said there are three "tricks" we can play—FinFETs, 3D architectures with the JEDEC Wide I/O memory standard, and new architectures for display.
While the power and performance advantages of FinFETs are well known, Woo observed that "FinFETs are not a free lunch. There are difficulties associated with them, and you have to understand them to really take advantage of the benefits of FinFETs."
As for 3D architectures with Wide I/O, Woo said it is "conceptually very beautiful" to put memory on top of logic using thousands of connections. But there aren't many such devices, because they require logic design, memory design, and packaging expertise. Woo showed pictures of a 3D-IC with Wide I/O that provided 14% more bandwidth than LPDDR3 memory, while using 60% less power.
New display architectures represent a "niche" area that has a lot of promise, Woo said. If you can put memory inside the display driver IC, then the applications processor can just "shift data and forget it," allowing a greatly reduced workload. In some cases, application processor power can be reduced by 90%.
Are We Ready for 2018?
The above "tricks" will work for a few years, but something more fundamental is needed to the "magnitude of the revolution" that is coming in three to five years, Woo said. He noted that the first public demonstration of a flexible display occurred at the Consumer Electronics Show this year. This kind of display opens some interesting possibilities—for example, you could fold it like a handkerchief and put it in a pocket.
But what good is a flexible display if your smartphone still has a rigid PCB and a back cover? "None unless we change the PCB structure," Woo said. But if we could reduce all the chips and passive components into one or two chips, then we could have a flexible smartphone, he noted.
"Are we, as EDA and semiconductor companies, ready to take advantage [of flexible displays]?" Woo asked. "My assessment is, not really. We're still trying to figure out how many gates to put into a chip, not how to reduce the total number of chips to one." An SoC is supposed to place an entire system on a chip, but today's reality is more like "a system on 1,000 chips," he said.
"We should be able to come up with a new way to integrate the system, and a new way to take advantage of the flexible display," Woo concluded.
Other DAC 2013 Keynotes and Speeches
DAC 2013—Kaufman Winner Hu: FinFETs Will Serve Analog Design Very Well
Gary Smith at DAC 2013 - the $170M SoC Design is a "Myth"
NI CEO Sounds Call for Platform-based Design at DAC 2013
Cadence CEO at DAC 2013: 'I've Doubled, Tripled Down on Semiconductor Investment'
Freescale CEO at DAC 2013: "Internet of Things" Brings Opportunities, Challenges