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Q&A: Jiayuan Fang Discusses Sigrity, Cadence Merger, Signal and Power Integrity, and 3D-ICs

Comments(0)Filed under: Industry Insights, low power, Allegro, Power, OrCad, PCB, IC, signal integrity, SI, 3D IC, 3D-IC, thermal, package, power integrity, Fang, Sigrity, Speed2000, PowerSI, PI, chip/package/board, OptimizePI, Jiayuan Fang, high-speed, MCM, field solver

In July 2012 Cadence announced its acquisition of Sigrity, a leading provider of signal integrity (SI) and power integrity (PI) analysis tools for chip, package and board. Jiayuan Fang, Sigrity founder and CEO, joined Cadence as vice-president of R&D for high-speed design products in the Silicon-Package-Board (SPB) group. In this interview Fang discusses Sigrity and its products, the advantages of the Cadence acquisition, applications of Sigrity technology, and the SI/PI needs of 3D-ICs.

Q: Jiayuan, let's start with some background. When was Sigrity founded, by whom, and why?

A: It was mainly started with academic research. I got my PhD at U.C. Berkeley, went to the State University of New York (SUNY) as a professor, and worked closely with a few companies in New York state, particularly IBM. I had no plans to start a company. But in the early 1990s we had a pretty significant breakthrough in simulation technology to analyze multi-layer packages [multi-chip modules] and boards. We were able to analyze multi-layer structures much faster than it could be done before. So they [IBM] encouraged us to commercialize this technology.

I registered the company in 1994 as a sole proprietorship. We incorporated in New York in 1998, then moved to California and incorporated there in January 1999. When we incorporated Sigrity in New York and California, Raymond Chen and I were the co-founders.

Q: How would you describe Sigrity's mission?

A: Sigrity's mission was to become a leading company in providing high-speed solutions for the industry. It's a fast moving and very demanding industry sector. With every generation people have new products that run at higher speeds and have higher densities, and they have new requirements. Our focus is on SI and PI for package and board, and also part of the IC, including power and I/O.

Q: Sigrity developed a number of products. Which were the primary products?

A: The main products include PowerSI, for frequency domain analysis, and SPEED2000, for time domain analysis of packages and boards. Also, we developed PowerDC for dc power analysis and OptimizePI for ac power analysis. OptimizePI helps people place decoupling capacitors - which ones to choose, how many, and where to place them.

Q: What type of company, and what type of engineer, uses these products?

A: Typical industries include computers, graphics, high-speed networks, and in recent years cell phones. Products are used mainly by the analysis team, the engineers working on SI and PI. In the early years we offered products for experts and high-end users, but in later years we extended more and more to non-expert electrical engineers. For example, PowerDC and OptimizePI are targeted for both mainstream users and experts.

Q: What's the secret to Sigrity's success?

A: We won a lot of customers, especially in PI critical areas like computers and graphics. We have been closely engaged with those customers and very fast to react to their demands. We work with engineers and engineering managers and understand their detailed requirements. We won one by one, especially in the beginning.

Q: Three part question. What are the advantages of the acquisition for Cadence, for Sigrity, and for the customers?

A: Because high-speed design is becoming more and more critical, Cadence can certainly leverage those [Sigrity] technologies for various products and offer solutions. High speed design is not just about PCB and package; it also involves ICs and the entire system. I think Sigrity technology can bring Cadence a very good story to present to the customer - a good solution with high-speed analysis capabilities. So, this [Sigrity] is a very good supplement to the overall Cadence solution, an integrated solution from a single vendor.

For Sigrity, the advantage is that we can leverage tools such as Cadence IC design, Cadence packaging, Virtuoso custom design, and Allegro PCB, which have substantial market share. With Cadence we have both implementation and analysis. If you only have analysis, it is a partial solution.

I think the customer will also benefit. With different [EDA] vendors, you have different data going back and forth. The data transfer may not always be smooth or complete. Vendors may not be prompt to fix problems that may come from other vendors. With one vendor, the interface will be a lot more seamless and if a problem appears, it is much easier to solve.

Q: Cadence Allegro and OrCAD product lines already have some SI/PI capabilities. What does Sigrity add?

A: Cadence has very good pre-layout capabilities. Sigrity has been very good with post-layout verification, post-layout signoff, and system-level simulation for DDR and SerDes. So the solutions mostly complement each other. (Note: the chart below shows what Sigrity adds to existing Cadence SI/PI capabilities).

Q: Can Sigrity technology be used beyond conventional package and PCB design?

A: Yes, it can help tremendously for analog/mixed-signal ICs. We also have a strong electromagnetic field solvers that can be applied to custom ICs or digital ICs. In addition, Sigrity technology can supplement Cadence high-speed interface design IP, such as DDR3/DDR4. This type of IP benefits from Sigrity's power-aware signal integrity analysis technology, which includes the chip, package and board.

In the future, we'll have silicon interposers and 3D-ICs. Main issues in 3D-ICs include signal integrity, power integrity, and thermal. Basically it is the same problem as the packaging problem; it is not a single die problem. I think Sigrity expertise can contribute to this area.

Q: What additional SI/PI problems do 3D-ICs raise, and how can Sigrity technology help?

A: With 3D-ICs, you have more current and power to deal with, and you have to consider the interaction of one die to another die. And you have to consider SI as well. For example, a silicon interposer can reduce the signal length between chips tremendously.

There is also a thermal impact because the dies are so close together. You have to remove the heat. Temperature can impact circuits and circuit timing, as well as SI and PI.

Although it's a new application area with new challenges, the basic principles are very similar to existing package and board analysis tools.

Q: Developing all this technology took a lot of work! How many people were at Sigrity and how many of those have moved to Cadence?

A: Before the merger we had about 120 and think probably over 100 have joined Cadence. This includes R&D, AEs and sales.

Richard Goering

Related Blog Post

Why Cadence Bought Sigrity - and How It May Change PCB Analysis




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