Can silicon run at 60-240 GHz with good performance and energy efficiency? Yes, according to Ali Niknejad, professor of electrical engineering and computer science at the University of California at Berkeley. In a keynote speech at the Mixed-Signal Technology Summit at Cadence in September, now available in video, he detailed some very futuristic work underway at the Berkeley Wireless Research Center (BWRC).
I'm writing this now because the proceedings of the Mixed-Signal Technology Summit have just recently become available, including presentations and videos of many of the sessions. You can see a complete listing and access presentations and videos from companies including Boeing, Cadence, Maxim, Micron, and Spansion here. Access to proceedings requires a Cadence Community log-in -- quick and free registration if you don't have one.
Niknejad's keynote was titled "Pushing the Frontiers of Silicon: Digital RF, mm-Wave and Terahertz Communication and Imaging." He focused on high-frequency silicon for communications and imaging applications, including medical body scanners. He talked in detail about several 60 GHz chips designed at U.C. Berkeley, a 94 GHz band transceiver, a 240 GHz silicon prototype, and a digital RF polar transmitter.
"My research focus is going from the last mile to the last inch," he said. While many high-speed communications applications focus on long distances, "we need a very robust short-range link. A lot of research I've done goes into enabling that technology."
Niknejad identified the following research challenges:
- Higher frequencies (60 - 300 GHz) with CMOS/SiGe
- Wider bandwidths (>10 GHz) and high bandwidth modulation
- Low noise/high sensitivity and very precise timing
- Higher power levels with low voltage devices
- Configurability (multi-band cellular) and higher dynamic range
He then went on talk about "energy-efficient 60 GHz communication." In this discussion, he noted that CMOS transistors have reached ft of 300 GHz, and that the performance of interconnect and passives is now the limiting factor. He spoke of the advantages of phased arrays, which can provide an n-squared improvement in transmit power over a single power amplifier.
With charts and diagrams, Niknejad talked about 60 GHz chips designed at Berkeley. One chip used a "microwave" design style in which everything was done by hand. Another chip was a complete transceiver. In 90nm technology, a 60 GHz chip consumed around 150 milliwatts each for transmit and receive, and achieved 40 picojoules per bit, giving "great" energy efficiency for short-range communications. Next came a 65nm phased array transceiver with a very unusual architecture, but I'll leave that for the video.
A Better Image
Niknejad talked about the ongoing BWRC TUSI project, which stands for "Time Domain Ultra Wideband Silicon Imager." It is aimed at medical imaging. The idea is to use a timed array of mm-wave, ultra-wideband pulses to illuminate a pixel within the body. The scattered signal can be used to detect tumors. Instead of a big MRI machine, Niknejad said, this technology could provide a hand-held device that be taken anywhere -- kind of like a Star Trek "tricorder."
But how to make it real? Niknejad described a pulse-based radar imager that works, as he said, "just like a radar." It sends out a wideband signal and looks at reflections. To detect a tumor, you need 40 GHz bandwidth and 90 GHz carrier frequency. He discussed the architecture of a 94 GHz band transceiver, and presented the first TUSI chip, a single transmitter that demonstrated 26ps pulse widths at 90 GHz and 17dBm power.
"Another crazy project we've looked at is short range, wireless, chip-to-chip communications," Niknejad said. "Imagine a smart tablet that's paper thin, has a screen, has solar panels built into it, no battery, and the whole thing is flexible. And all the chips communicate with each other wirelessly."
What's needed to make this happen is a very small and very high-frequency radio. Hence the BWRC 240 GHz prototype chip, which was designed using a TSMC 65nm process and presented at the VLSI Symposium 2012 conference. This chip is "a trick," Niknejad said. "Everything is done at 60 GHz and at the very end we quadruple the signal to 240 GHz and transmit it. Then we mix 240 GHz down to 60 GHz and do the processing at 60 GHz."
Building a Universal Transmitter
For the last part of his talk, Niknejad went from 240 GHz down to 2 GHz or so, and talked about a digitally modulated polar power amplifier that BWRC has taped out in 65nm technology. He noted that the device can filter out unwanted spectral lines, and he talked about the filter design and how it reduces power. He also discussed the phase path architecture.
In conclusion, Niknejad noted how RF design has gone from "black magic" for PhDs to class projects for undergraduates. How did this happen? Technology scaling, better models, and good books and papers, he said. In particular, he noted that simulation tools have greatly improved. "It's amazing how much better the tools are today," he said. "When I started out you wouldn't even dream of simulating a PLL. Today you can take a PLL with a few thousand transistors and get it to lock in a few hours of simulation time." Niknejad acknowledged Cadence for the donation of design tools.
You can access the 45 minute video, along with other proceedings from the Mixed-Signal Technology Summit, here.