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Free Low Power Summit – Dr. Jan Rabaey, ARM, Freescale, and More

Comments(0)Filed under: Industry Insights, ARM, low power, Freescale, low-power, Cadence, Low-Power Technology Summit, low-power summit, Rabaey, Jan Rabaey, MuSyC, BWRC

If you're involved - or just interested - in any aspect of low-power electronics design, you'll find a lot of good information at a one-day Low-Power Technology Summit at Cadence headquarters in San Jose, California October 18. Highlighting the event is a keynote by Jan Rabaey, professor of electrical engineering and computer science at the University of California at Berkeley, and somewhat of a "rock star" when it comes to low-power electronics and EDA.

With a full day of speakers from Cadence, Cadence partners, and customers -- and a closing panel -- the summit will bring you up to date on the latest low-power design methodologies. The summit covers verification, physical implementation, and signoff. Several other notable items on the agenda include:

  • A presentation on ARM physical IP and processor optimization packs
  • A Freescale presentation on low-power design in the Kinetis MCU
  • An update on power format standards
  • Free lunch with Cadence R&D experts

Here's the agenda as of Sept. 24:

08:30am – 09:15amRegistration
09:15am – 09:30amWelcome by Cadence Executive
09:30am – 10:30amKeynote Presentation: Professor Jan Rabaey, UC Berkeley
10:30am – 10:45amCoffee Break
10:45am – 11:30amLow-Power Solution Technology Update, Cadence
11:30am - 12:30pmLow-Power Design with ARM® Physical IP and Processor Optimization Packs, ARM
12:30pm - 01:30pm Lunch with R&D Roundtable
01:30pm – 02:15pmLow Power Verification in Mixed-Signal Designs, Cadence
02:15pm – 03:00pmCustomer Case Study: Low-Power Design Experiences on Kinetis, Freescale
03:00pm – 03:15pmCoffee Break
03:15pm – 04:00pmPower Format Standards Update, Dr. Qi Wang, Cadence
04:00pm – 04:45pmPanel Discussion and Q&A
04:45pm – 05:00pmPrize Draw & Close

So, who is Jan Rabaey? For starters, he's been at the EECS faculty at U.C. Berkeley since 1987, where he currently holds the Donald O. Pederson Distinguished Professorship. He is the scientific co-director of the Berkeley Wireless Research Center (BWRC) as well as director of the Multiscale Systems Research Center (MuSyC). He has authored a wide range of papers in signal processing and design automation. You can read more here.

Rabaey literally "wrote the book" on low power design. It is called Low Power Design Essentials and it is available from Amazon. For a detailed review of a one-evening "short course" on low-power design that Rabaey gave earlier this year, see Steve Leibson's blog post on Low-PowerDesign.com.

The Low-Power Technology Summit is free but you need to register, and space is going fast. You can sign up here.

Richard Goering

 

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