Cadence.com will be under maintenance from Friday, Oct. 3rd at 6pm (PST) thru Sunday, Oct 5th at 11pm (PST).
Cadence.com login, registration, community posting and commenting functionalities will be disabled.
Home > Community > Blogs > Industry Insights > whitepaper connecting specman e language to systemc tlm models
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Industry Insights blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Whitepaper: Connecting Specman e Language to SystemC TLM Models

Comments(0)Filed under: Industry Insights, SystemC, TLM, specman, verification, Functional Verification, Incisive, whitepaper, e language, TLM 2.0, Specman/e, generic payload, transaction-level modeling, interface additions

SystemC Transaction-Level Modeling (TLM 2.0) is coming into widespread use for virtual platforms and high-level verification, but the benefits of TLM models will be limited if there's no connection to more conventional hardware verification languages. A recently published whitepaper in the Cadence Resource Library addresses this problem by describing interface additions to the Specman e language for communicating with SystemC TLM 2.0 models.

Why is an e language TLM 2.0 interface needed? As the whitepaper notes, high-level models are becoming important in functional verification for several reasons. Verification can start much earlier, high-level verification can address functionality without going into timing or protocol details, and most or all of the high-level verification environment can be reused during RTL verification. However, if a verification environment is going to interact with SystemC models, it needs a convenient and efficient connection to TLM 2.0.

The whitepaper, titled "Interface Additions to the e Language for Effective Communication with SystemC TLM 2.0 Models," describes interface additions to e that provide such a connection. It begins with an overview of TLM 2.0 communications mechanisms. The whitepaper shows how the TLM 2.0 standard defines a set of interfaces that pass transactions between initiator and target sockets. A "generic payload" contains control attributes (such as address, command, and byte enable) and data.

Adding New Types

The e TLM 2.0 interface focuses on socket-based communications using the generic payload. Implementing the interface requires some additional types, all of which are closely aligned with the SystemC TLM 2.0 standard in terms of names and enumeration values. The newly added types, which are described in detail in the whitepaper, are as follows:

  • Two new kinds of ports to represent sockets: tlm_initiator_socket and tlm_target_socket
  • A new struct, tlm_generic_payload, to reflect the generic payload, and a new struct tlm_extension for the generic payload extension mechanism (needed because the generic payload does not describe every attribute)
  • Several additional enumerated types required for the interface: tlm_phase_enum, tlm_command, tlm_response_status, tlm_sync_enum, and tlm_endianness
  • The singleton object ml_uvm, which has been extended with some utility functions

Communication between e and SystemC is made possible by the multi-language library of the Cadence Incisive Enterprise Simulator. This library provides the infrastructure to enable cross-language synchronization and type mapping on the language boundary. Consequently, users need to adopt the multi-language flow, which requires certain compile and run-time switches for the tools.

And the reward? "The new interface additions of Cadence Specman technology enable a convenient and efficient way to connect e testbenches to SystemC models with TLM 2.0 interfaces," the whitepaper concludes. "Standard TLM 2.0 communications mechanisms are supported, which allows verification engineers to focus on verification and not have to worry about the interface."

You can read the whitepaper here.

Richard Goering

 

 

Comments(0)

Leave a Comment


Name
E-mail (will not be published)
Comment
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.