Home > Community > Blogs > Industry Insights > free dac lunches custom analog variability arm low power processors in mixed signal designs
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Industry Insights blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Free DAC Lunches: Custom/Analog Variability, ARM Low Power Processors in Mixed-Signal Designs

Comments(0)Filed under: Industry Insights, ARM, DAC, low power, Analog, Mixed-Signal, mixed signal, NXP, ST, variability, custom/analog, Design Automation Conference, layout dependent effects, LDE, Cortex-M0, Cadence at DAC, DAC lunches, MCU

There is such a thing as a free lunch - if you're at the 49th Design Automation Conference (DAC) in San Francisco June 3-7. Cadence is sponsoring two lunches at which you can learn about two important technology topics - custom/analog variability, and the use of ARM processors in low-power, mixed-signal designs.


Monday June 4
Overcoming Variability and Productivity Challenges in Your High-Performance, Advanced Node, Custom/Analog Design
Time: 12:00 PM - 1:00 PM (doors open and food is served at 11:30 AM)
Location: 270-276 (Moscone Convention Center)

Speakers at this lunch include Francois Lemery, CAD Project Manager, STMicroelectronics; Vinod Kariat, Fellow, Cadence; and Thomas Volden, Architect, Cadence. Speakers will show why variability is introducing new challenges at advanced process nodes, including layout-dependent effects. Cadence experts will demonstrate a comprehensive flow that can reduce total design time, manage layout-dependent effects, and optimize circuit performance without over-designing.

Tuesday June 5
Overcoming the Challenges of Embedding Ultra Low-Power, ARM 32-bit Processors into Analog/Mixed-Signal Designs
Time: 12:00 PM - 1:00 PM (doors open and food is served at 11:30 AM)
Location: 270-276 (Moscone Convention Center)

Speakers at this luncheon include Rob Cosaro, MCU System and Architecture group, NXP; Keith Clarke, VP Embedded Processors, ARM;  John Murphy, Alliance Group Director, Cadence; Mladen Nizic, Engineering Director, Cadence; and Jamie Davey, ARM Alliance Director, Cadence. Speakers will participate in a roundtable discussion showing how you can integrate ARM Cortex-M processors and other design IP into your mixed-signal design more efficiently. Attendees will learn about the advantages of the new Cortex-M0 processor, ARM Cortex-M based MCUs from NXP, and the Cadence low-power and mixed-signal design solution.

Interested? Learn more about Cadence DAC lunches and breakfasts here

Register for lunches and breakfasts here

Learn about all Cadence DAC activities, including the Denali Party, here

See you in San Francisco!

Richard Goering



Leave a Comment

E-mail (will not be published)
 I have read and agree to the Terms of use and Community Guidelines.
Community Guidelines
The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.