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CDNLive! Paper –Why Doesn’t My Board Work?

Comments(1)Filed under: Industry Insights, Allegro, SKILL, PCB, CDNlive, design rules, board, CDN Live!, CDN Live, validation software, PCB manufacturing, PCB test, PCB assembly, PCB fabrication, Adiva, Milks, design validation

Why would a printed circuit board design go through a CAD system without a hitch, and then produce problems in fabrication or assembly - or worse, fail in the field? A paper at the recent CDNLive! Silicon Valley 2012 (Cadence user group conference) illustrated a number of ways this can happen, and showed how design validation software can prevent such errors.

The paper, titled "Why Doesn't My Board Work," was presented by John Milks, president of Cadence partner Adiva. The company provides tools that validate PCB designs. Recently Adiva announced a joint marketing agreement with Cadence to provide an integrated solution for PCB design, validation, and correction of layout errors.

Milks started by painting a plausible scenario. Board designers are under pressure to complete a design that has to be finished by Friday. It goes through the CAD system fine, but the fabrication people come back and say it doesn't work. Or problems arise during assembly or functional test. "How can this happen?" he asked. "How can everybody say the board is okay, get it through the CAD system, and still have a problem?"

Designers Make Mistakes

The first obstacle to overcome is denial. "When I go and try to sell my software," Milks said, "the first thing people tell me is that ‘my engineers don't make mistakes.' Or, the CAD system won't let errors out. Or, the fab guy is checking for me. Or, I plot the artwork and look at it. Or we just don't have time." Even with very good designers, he said, "with the complexity of boards today, mistakes just creep in."

How do mistakes happen? Milks listed some of the ways:

  • Poorly defined design rules
  • Warnings are not seen, or are ignored
  • Mismatched revisions
  • Checking not available or turned off
  • Hiccups in data generation
  • Rule set conflicts between software packages
  • Mistakes in interconnect design
  • Insufficient designer training
  • Mistakes in part generation

"I ran a board shop 10 years ago, and 15% of the boards coming in had opens and shorts. Incredible! I called them back before I came here and they still get 5% of the boards with opens and shorts," Milks said.

He then spent most of the talk showing a number of examples of design problems that probably wouldn't be caught until a board goes into manufacturing. Some examples are below.




"There are lots of problems the CAD system isn't going to catch, and as you go down the supply chain they're not even going to look at it," Milks said. "They don't know and they don't care. They made the board to your design. And now it's not only costing you money, it's costing you time."

Design Validation

The errors that Milks showed can be detected by design validation software such as that offered by Adiva. He didn't go into details in the CDNLive! talk, but the Adiva web site shows that the company offers tools for netlist comparison, design rule checking, and a "viewer with intelligence." Milks did note the that Cadence collaboration agreement provides a SKILL link between Adiva tools and the Cadence Allegro PCB editor, making it easy to extract layout information, find a violation, mark it, and send it back to Allegro for repair.

"Saying you're done is not the job," Milks concluded. "Your job is to make sure the board is as error free as possible, and design validation is a required part of any design." For that, he argued, "you've got to use software today. You can't just eyeball today's designs and find problems."

CDNLive! Silicon Valley 2012 proceedings will be available here for conference attendees.

Richard Goering



By Bob Potock on April 11, 2012
PCB design errors are an element of a bigger topic - design correctness.  Design correctness is a combination of the logical design ( is the schematic correct? ) and the physical design ( is the PCB layout correct? ). Two PCB designs built off a common schematic can have very different performance outcomes based on the PCB design ( placement, routing, power, etc ).   In other words,  a logically correct design can still fail functional testing at the prototype phase.  The challenge is to find a design verification solution that can thoroughly test (memory in particular) a prototype at speed and at different operating points.  My experience is that many PCB designs go to software development and ultimately production with less than adequate functional test coverage ( i.e. holes in the test coverage).  The outcome is unreliable hardware leading to some finger pointing between the hardware and software teams.  Check out.

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