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Designing ARM-Based SoCs? Don’t Miss This Event!

Comments(0)Filed under: Industry Insights, ARM, Chi-Ping Hsu, Mixed-Signal, mixed signal, Verification IP, Lip-Bu Tan, AMBA, software, ARM Techcon, Virtual System Platform, Rapid Prototyping Platform, ACE, clock concurrent optimization, system design, chip design, Cortex-M0

Do you design or program systems-on-chip using ARM processors - or plan to? If so, ARM TechCon is the place to be Oct. 25-27, 2011. Cadence is the official "signature sponsor" of this year's conference and has a number of papers and activities there. I'll first provide a general overview of the conference and then list some of the Cadence-specific presentations and events.

ARM TechCon actually includes two conferences - a Chip Design Conference Oct. 25, and Software & Systems Design Conference Oct. 26-27. The Chip Design Conference  provides technical presentations and exhibits for chip design teams working with ARM silicon IP and tools. The Software & Systems Design Conference provides courses and exhibits for system developers. Here are some more specifics:

Chip Design Conference - Tuesday Oct. 25

  • Keynote speeches by Dr. Shang-Yi Chiang, senior vice president R&D, TSMC, and Wally Rhines, Mentor Graphics CEO (8:30 am - 9:30 am)
  • Industry Address by Chi-Ping Hsu, senior vice president R&D, Cadence, titled "Higher Stakes at Lower Technology Nodes" (9:30 am - 10:15 am)
  • Fireside Chat hosted by Lip-Bu Tan, Cadence CEO (5:00 pm - 6:00 pm) followed by reception sponsored by Cadence
  • 25 paper sessions in four tracks: SoC design and verification, SoC architecture and analysis, power and performance, and SoC IP (11:00 am - 4:10 am)

Software & Systems Design Conference - Wed. and Thurs., Oct. 26-27

  • Keynote by Mike Muller, CTO, ARM, titled "2020 in 26 Easy Steps"
  • Classes in tracks such as creating smarter systems, networking & connectivity, safety & security, human interface design, Android/open source, low power design, and fundamentals of ARM.

Cadence Presentations and Events - Chip Design Conference

In his Industry Address, Chi-Ping Hsu will discuss the collaborative ecosystem that's needed for complex designs at 32nm, 28nm, and 20nm, and show how Cadence and ARM are working together to help bring advanced-node, cutting-edge designs to market more efficiently.

Paper presentations will occur after the Industry Address, and the following papers have Cadence authors or co-authors. Clicking on the links will bring you to the abstracts.

Cadence and ARM will co-present a sponsored session Tuesday at 2:00 pm titled "Unified Flow for Mixed-Signal Design with an Embedded Cortex-M0." The session will note the challenges of mixed-signal design with microcontrollers, and present a flow that integrates analog and digital design leveraging the OpenAccess database.

Additionally, demonstrations at the Cadence booth (#29) will feature design IP for memory; Silicon Realization for low-power and GHZ+ ARM processors; an optimized ARM implementation methodology for ARM IP; and clock concurrent optimization for Cortex-A9 based design.

Cadence Presentations and Events - Software & Systems Design Conference

Cadence will exhibit in booth #500 and will demonstrate the Rapid Prototyping Platform, Virtual System Platform, and Verification IP catalog. ARM will also demonstrate the Cadence Virtual System Platform in its booth (#300).

Wednesday at 3:30 pm, Cadence will offer a sponsored session titled "Verifying your ACE-based SoC: Will Tried and True Methods Hold Up?" This session will review the challenges of verifying cache-coherent SoCs employing the new AMBA 4 ACE protocol, and discuss the role of verification IP.

The following Cadence paper will be presented Thursday:

[ATC-302] Thursday 11:00am: Creation and Usage of SystemC Virtual Platforms for Multi-Core System Debugging and Analysis

More information about Cadence activities at ARM TechCon is available here. For further conference information and registration, see the conference web site.

Richard Goering





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