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Seven Emerging Mobile Device Standards – and How to Verify Them

Comments(0)Filed under: Industry Insights, Verification IP, VIP, Mobile, memory, flash, VIP Catalog, protocols, memory models, JEDEC, UFS, MIPI, eMMC, LLI, USB 3.0, compact JTAG, camera interface, cJTAG, MMC, nonvolatile, low latency interface, IEEE 1149.7, MMC4.5, USB OTG, On the go, LPDDR3, mobile device standards, mobile devices, CSI-3, On-the-go, interface, Universal Flash Storage

Seven emerging protocol and memory interface standards are promising to bring new capabilities to smartphones, tablets, and a myriad of other "smart" mobile devices. These new standards will offer unprecedented speed, low latency, low power, and high capacity, dramatically improving the user experience through text, graphics, video, and sound.

These new standards have something else in common - Cadence today (Sept. 26) is announcing verification IP (VIP) or memory model support for all of them, even though, in some cases, the specifications are not yet complete. The early support is intended to give design teams the confidence and capability they need to implement the new standards. More on the VIP later - first let's take a look at each standard, its status, and its promised capabilities.


This JEDEC spec is the low-power version of the DDR3 memory standard. It represents an extension of the current LPDDR2 standard, which was published in 2009. LPDDR3 supports bandwidth up to 6.4GB/second, and allows 12.8GB/second for a dual channel configuration. LPDDR3 will preserve the power-efficient features and signaling interface of LPDDR2, allowing for fast clock stop/start, low power self-refresh, smart array management, and un-terminated signal lines.

LPDDR3 is currently under development in the JEDEC JC-42.6 committee. Further information is located at the JEDEC Mobile Memory site.


This is an advanced processor-to-camera sensor interface that allows mobile devices to deliver the bandwidth required to provide high-resolution video and 3D graphics. MIPI has not released public information about this emerging standard, but its Camera Interface Specification site has detailed information about the current CSI-2 specification.

MIPI Low Latency Interface (LLI)

This interface allows DRAM memory sharing between two chips for data and program, thus reducing the need for software intervention, and cutting mobile device production cost. The spec is still under development, and limited public information is available at the MIPI LLI Working Group web site.

USB 3.0 On-The-Go (OTG)

USB OTG allows mobile devices to assume the role of host or device.  For example, an OTG port on a smart phone assumes the role of a device when connected to a PC to download music, then later takes on the role of host when connected to a memory stick to load pictures.  USB OTG was originally part of a supplement to the USB 2.0 specification. More recently, support for SuperSpeed OTG devices, embedded hosts, and peripherals was added through the USB OTG and Embedded Host Supplement to the USB 3.0 specification. SuperSpeed USB 3.0 is 10X the speed of USB 2.0. A detailed Wikipedia entry tells more.

Universal Flash Storage (UFS)

This next-generation storage system standard is now available for download from the JEDEC web site. Designed for mobile devices, UFS is designed to bring higher data transfer speeds and increased reliability to flash memory storage. It heralds a new generation of memory cards that will use high-speed serial interfaces, providing the ability to download high-definition video much faster than current memory cards. Specifically tailored for devices requiring high performance and low power consumption, UFS initially supports data throughput of 300 MB/second.

To achieve the highest performance and most power efficient data transport, UFS uses the MIPI M-PHY and UniPro specifications to form its interconnect layer. Further information is available from JEDEC.

eMMC 4.5

In June 2011 JEDEC announced the publication of eMMC (embedded Multi-Media Card) version 4.5, continuing the evolution of the MMC standard for embedded non-volatile memory storage. The eMMC v4.5 standard defines functionality that improves the interaction between the host processor and the memory device at the interface, configuration and protocol levels, resulting in potential gains in overall system performance and reliability. It increases interface bandwidth to 200 MB/second. It also adds a provision for a volatile data cache.

Over time, it is expected that the MMC specifications will be superseded by UFS.

cJTAG (compact JTAG)

The compact JTAG interface is the IEEE 1149.7 standard. Compared to the venerable JTAG test standard, cJTAG offers reduced pin count, power management, and simplified multi-chip debugging. It thus allows efficient testing of mobile devices.

The Verification Challenge

All of these standards are complex and difficult to verify. Susan Peterson, Cadence product marketing group director for VIP, noted that each "enhanced" specification is more complex than the previous one. "Imagine trying to keep up to speed with all these new standards, and having engineers who can understand and implement them," she said. And that's where verification IP comes in. With the early availability of verification IP and memory models, design teams can more feasibly tackle a new or emerging standard.

VIP automates verification for standard interfaces. It checks protocol compliance to the specification, verifies host and device designs, provides state machine monitors for both sides of the interface, and generates and drives test sequences. It can take engineer-years of development time to build VIP for complex protocols from scratch. Memory models check protocol compliance to the manufacturer's datasheet, verify host designs, include state machine monitors relevant to memories, and include gate-level timing parameters.

Cadence has been involved with most of the above standards from very early phases, and now offers VIP for MIPI CSI-3, MIPI LLI, USB 3.0 OTG, and cJTAG. Cadence offers memory models for LPDDR3, UFS, and eMMC 4.5. The VIP and memory models are available now and have been added to the Cadence Verification IP Catalog.

This catalog now features support for over 30 complex protocols and models for over 6,000 memory devices, including recently announced VIP for the ARM ACE protocol. The catalog's VIP and memory models run on all major simulators, work with multiple test bench languages, and support verification methodologies including OVM, UVM and VMM. The new catalog additions described in this blog post will help put some groundbreaking new applications into the hands of mobile device users.

Richard Goering

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