What are the most important system on chip (SoC) interfaces that design and verification engineers need to understand? A "top ten" list presented at the August 25 Verification IP (VIP) seminar at Cadence included some old standbys and some new and emerging interface specifications. The list was provided in the opening session of the seminar, which provided an in-depth look at the Cadence VIP Catalog and presented case studies showing the verification of AMBA4 ACE, PCIe Gen3, USB 3.0, and DDR4 interfaces.
In the opening session Tom Hackett, Cadence product marketing manager for VIP, cited "two revolutions driving massive change in the electronics ecosystem." One is the Mobile Revolution, in which mobile devices are replacing PCs. Part of this revolution is what Hackett called "the triumph of the app," including media apps, business apps and physical apps. The second revolution is the Cloud Revolution, which is "providing the hub for the mobile world" in two ways - by allowing the on-line storage of data, and by providing access to software running on remote servers.
Hackett noted that system interfaces play a key role in both the mobile and cloud markets. "The biggest single challenge impacting mobile and server projects," he said, "is your ability to master the verification of these interfaces. This work will directly influence the end user's experience."
The 10 Essential SoC Interfaces
Hackett divided his "top ten" list into two portions. The first five interfaces, shown below with his comments, enable mobile technology. Included here are new and emerging interfaces such as MIPI LLI, LPDDR3, and UFS.
The next five interfaces enable cloud technology.
"Your job as a verification engineer," Hackett told the audience, "will be to master these interfaces." VIP can help, he said, by automating the verification of standard interfaces, checking protocol compliance, verifying host and device designs, and generating and driving test sequences. The newer protocols are so complex that home-grown VIP could take engineer-years of development.
Hackett's presentation also discussed the Cadence VIP Catalog. The following two figures show VIP components (blue) and memory models (yellow) available in the catalog. These VIP components and models run on all major simulators. Further information is available here.