With deployment in some 5 billion mobile devices worldwide, flash memory has been wildly successful. But where will nonvolatile memory technology go from here, and how much further can it scale? Some answers emerged from three keynote speeches at the Flash Memory Summit August 9.
The speakers were Yoram Cedar, CTO of SanDisk; Eric Kao, CEO of Memoright; and Glen Hawk, vice president of NAND solutions at Micron Technology. These were the first of nine keynotes spread over the three-day technical program. (For a look at Cadence sponsorship and participation in the technical program and the exhibits, see my previous blog post).
Cedar started the sessions on an upbeat note, by predicting a "very bright future for flash" (pun intended?) He cited strong demand drivers, including enterprise servers and client devices for cloud computing, and noted a "healthy balance" between demand and supply. Cedar gave some specific predictions for 2015, where, he believes, smartphones will consume 33% of NAND bits; tablet PCs will consume 15%; solid state drives (SSDs) will consume 25%; and established end markets such as cameras and USB devices will consume 26%.
Lithography Forces a New Dimension
However, there's a problem looming in the near future. Scaling is becoming increasingly difficult with conventional lithography, and extreme ultraviolet (EUV) lithography is still some distance in the future. "This reduction in scaling also means we are not going to bring up so much supply," Cedar said. "The rate of growth is going to be lower than it used to be."
One way out of this quandary is to look up -- to 3D-IC design. Cedar noted that "vertical NAND" can use older lithography, potentially extending the lifespan of NAND flash. One vertical NAND technology that can be done with current lithography is bit-cost scalable (BiCS) technology. Meanwhile, SanDisk and other vendors are continuing to work on 3D resistive RAM, which according to Cedar holds the best promise for post-NAND technology. However, it will require EUV.
Micron is also thinking in three dimensions, according to Hawk. For 20 years, he noted, the memory industry has been "trapped in Flatland." Scaling is becoming increasingly difficult, and not just because of lithography; at 20nm cells are so close that they interfere with each other, "even if we make them perfectly." At 20nm, in fact, the state of the cell (1 or 0) is determined by approximately 20 electronics, and they are "not well behaved" in such small numbers.
Hawk showed a 3D NAND flash cell stack in which each "floor," or level, is a flash memory element. It's a "paradigm buster that takes us back to the future," he said. Instead of 20 electrons, 3D NAND can provide 10,000 electrons to work with. Benefits include relaxed design rules, more capacity, and cost reduction. Further, because non-flash memory circuitry can be tucked under the memory element, smaller die sizes are possible.(For more details about the Micron NAND stack, and some nice pictures, see Steve Leibson's blog post).
Micron is looking at other technologies as well. One is phase-change memory, which Hawk said "will not replace NAND but will bring a different utility, and will enable the continuance of NAND and DRAM for quite some time."
Adapting to the Application
Another trend that Cedar noted is the difficulty of adapting flash to increasingly demanding applications. Even as flash scales down and cost goes down, this becomes a bigger challenge, he said. SanDisk's approach is "adaptive flash management," which understands what's happening on the application side and partitions the memory so it responds to the needs of the system.
At a third keynote, Memoright CEO Kao spoke in detail about the need to adapt SSDs to specific applications. He focused on firmware, which he said is "responsible for the personality of the SSD," including the right performance characteristics for a given application. Kao noted that flash media has many more parameters than hard disk drives (HDDs), and that SSDs do not necessarily run faster than HDDs, given the large potential latency range of SSDs.
To illustrate that different applications call for different architectural and firmware approaches, Kao discussed four case studies. For example, for a digital video recording application, the best approach involves block mapping, vertical wrapping, and data buffering for a small payload. Memory management needs to reduce fragmentation, reduce write amplification, and maintain constant speed. For a mainstream PC, the best approach involves pure page mapping, 4KB mapping granularity, and low over-provisioning for more user space. There will be a wide latency spread, but in this case, that's okay.
Kao concluded that "as an SSD developer you had better ask your customer what he wants, what he's going to use this SSD for, what is the access time and so on, before you do the design." This is very much in alignment with the EDA360 message, which stresses the importance of understanding the needs of applications before designing hardware/software systems of any type. The end goal is not designing cool silicon -- it's all about the end user experience. And that's what will guide the ongoing evolution of flash.