Two leading EDA industry standards organizations - Accellera and the Open SystemC Initiative (OSCI) - announced their intent to merge into a "new organization" today (June 22, 2011). The move will bring most "front end" EDA standards (RTL and above) under one roof, and potentially make it easier to align SystemC and the OSCI TLM modeling standards with other industry languages and standards. The result: a stronger EDA standards effort across multiple levels of abstraction.
The union will help unite standards activities at the RTL, system, and software levels, said Mike Meredith, OSCI president. "All of these [levels] are having to come together to get chips out in a reasonable time frame," he said. "As design activities start to converge, the need for tightly coupled standards in all these areas increases."
"The entire system really needs to be designed with hardware and software in mind," said Shishpal Rawat, Accellera chair. "More and more, we have to figure out how to get the software done in a manner that benefits the industry with respect to turnaround times and common standards."
There's a precedent for this merger. Last year the Spirit Consortium, creator of the IP-XACT metadata standard for IP integration, merged into Accellera. As a result, Rawat said, IP-XACT is being adopted in the system design community "in a much broader way," with many downloads of the standard since it became part of Accellera.
However, today's merger does not appear to be about one organization merging "into" the other. Rawat said that Accellera and OSCI are forming a single organization, and are currently discussing what the final form and shape will be. Meredith said that the boards of Accellera and OSCI have each formed a subcommittee to thrash out the organizational details. One question that remains is what the new organization will be called.
SystemC and UVM
The Accellera-OSCI merger opens the door to some interesting possibilities, especially with respect to the Universal Verification Methodology (UVM) and SystemC. At a "town hall meeting" at the DVCon conference in February, organized by Accellera and OSCI, there were several calls for a UVM-SystemC capability. Said one audience member: "we need to define what methodology to use with SystemC, and how to bring it back to RTL. An open-source implementation of UVM for SystemC would really help out a lot."
"Clearly, multi-language support is something we need to work on from a UVM perspective," Rawat said. He also noted that there needs to be some "common ground" in the analog/mixed-signal extensions to SystemC and Verilog that OSCI and Accellera are working on, respectively.
"We observe that more and more activity in SystemC is becoming tightly linked with implementation activity at the RTL level, and we need to bring this together," Meredith said.
According to Stan Krolikoski, group director of standards at Cadence, combining Accellera and OSCI may help accelerate some existing standards efforts and foster new ones. "SystemC is getting more and more aligned with other design languages, so it makes perfectly good sense," he said. He noted that TLM 2.0 has become part of the Accellera Universal Verification Methodology (UVM), that some designers have expressed interest in UVM-SystemC and other languages, and that many designers would like to be able to move from SystemC to SystemVerilog in a more transparent manner.
After the Spirit Consortium moved into Accellera, Krolikoski observed, the UVM register team needed to work with the IP-XACT team in order to have some consistency in register descriptions. This was easy because both teams were part of one organization. With two different organizations, IP rules, and management, this kind of synergy would be much more difficult, Krolikoski noted.
Ongoing Accellera activities include the following:
- Interface Technical Committee - SCE-MI standard for co-emulation and transaction-based acceleration
- IP-XACT Working Group -- Metadata standard for IP integration
- IP Tagging Technical Committee - Tracking IP throughout development process
- Open Verification Library Technical Committee - OVL assertion library
- Unified Coverage Interoperability Standard (UCIS) - Verification coverage interoperability
- Verification Intellectual Property Technical Committee - Universal Verification Methodology (UVM) standard
- Verilog-AMS Technical Committee - Analog/mixed-signal extensions to Verilog
Ongoing OSCI activities include these working groups:
- AMS- Analog/mixed-signal extensions to SystemC
- Configuration, Control and Inspection - Standards for exchange of information between SystemC models and tools
- Language - SystemC language standard
- Synthesis - Synthesizable subset of SystemC
- Transaction Level Modeling (TLM) - OSCI TLM 1.0 and 2.0 modeling standards
- Verification -- SystemC Verification Library
It will be interesting to see how these activities converge - and what new initiatives arise.