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DAC Panel Calls Off “Battle” Between Prototyping and Emulation

Comments(0)Filed under: Industry Insights, Palladium, Qualcomm, virtual platforms, Intel, IBM, Incisive, acceleration, emulator, emulation, embedded software, Cadence, Synopsys, System Development Suite, prototyping, DAC 2011, hardware/software integration, rapid prototyping, DAC: DAC panel, virtual prototypes, Stanford, prototyping vs. emulation, virtual prototyping

A Design Automation Conference (DAC) panel June 8 looked like it was destined for controversy. It was titled, "Software-Hardware Verification Battle: Prototyping vs. Emulation." But that battle didn't happen. Instead, most participants agreed that several types of hardware/software integration platforms are needed, and that what's lacking today is an integrated methodology for using them.

The panel was moderated by Bryon Moyer of TechFocus Media. Panelists included:

  • Subhasish Mitra, professor of electrical engineering and computer science, Stanford
  • Chris Tice, vice president and general manager of the Cadence System Design and Verification group
  • Avi Ziv, member of the verification technologies department at IBM's Haifa Research Lab
  • Joachim Kunkel, vice president and general manager of the Synopsys Solutions Group
  • Raj Yavatkar, Intel fellow
  • Albert Camilleri, engineering director, Qualcomm

Panelists looked at three types of development platforms - the software-only virtual prototypes (or "virtual platforms") used for early software development, hardware RTL accelerators and emulators used for system integration, and FPGA-based rapid prototyping boards used for post-RTL hardware/software debugging. (Coincidentally, Cadence recently announced integrated solutions in all three areas with its System Development Suite.)

A "Boring Question"

First up to speak was Mitra, who didn't mince words. "This question about prototyping versus emulation is a boring question," he said. "There are several aspects that determine whether you go with prototyping or emulation, or a combination of the two. More interesting is the question of how you do the actual validation." Academic research can help find more efficient ways to do validation, but needs a "really good suite of benchmarks" to do so, he said.

Tice noted that software development is expected to take up 56% of the overall system development time by the 22nm node.  Hardware design is complicated by multi-core architectures, while software includes millions of lines of code. There are tools today that address "pieces" of the hardware/software integration problem, but "most solutions are closed, fragmented, and limited," he said. "We need to unify these [platforms] together."

The System Development Suite, Tice noted, provides a "continuum" of tightly integrated platforms built on top of the Incisive simulation and Palladium emulation environments. It includes virtual prototyping, testbench simulation, RTL acceleration/emulation, and FPGA-based prototyping.

"I don't think there's a battle between rapid prototyping and emulation," said Ziv. "We need to find the right product for the right job." While IBM uses development platforms that provide good performance, engineers want more ability to optimize the platforms, he said. One example is inserting more checking capabilities into a platform so bugs can be detected when they happen, not just when there's a system failure.

Kunkel noted that a system-on-chip (SoC) is "pretty much an execution platform for software," and that it's difficult to build a chip if no software is available. He said that virtual prototyping is a good way to start software development before RTL. Then, when the RTL is "reasonably good," engineers can switch to rapid prototyping.

User View -- The Need for Integration

Intel's Yavatkar noted that chips are becoming application-level processors, and that the problem with traditional verification is that software design doesn't start early enough, which means that software can't be used to constrain power, performance and functionality. "What frustrates me as a user of EDA tools," he said, "is that I started to look at all the tools in the tool box, and they are not well connected. We do not have a design/verification flow where we can plug in different tools and take a consistent approach to verification."

Qualcomm's Camilleri noted that he doesn't work in a university or research lab - he's on the "front line" and is responsible for making sure ICs ship on time and with high quality. "Complex SoCs cannot be segregated into independent hardware and software development where each one is unaware of the requirements of the other," he said. "Our products are expected to be fully integrated hardware/software solutions. There is no time for sequential development."

To address these challenges, Camilleri noted, there are various platforms on the market - virtual prototypes, emulators, hardware prototypes. "But no one platform offers a complete solution," he said. "Platforms have different advantages and strengths. And herein lies the challenge - how do I choose? How do I stitch platforms together, so as to move to another seamlessly? The flow from one platform to another has to be efficient."

"It cannot be a battle between hardware and software, but a collaboration for faster time to market," he said.

The Role of Emulation

There was a ripple of controversy over the role of emulation. During the Q&A period, Synopsys' Kunkel noted that his company is "making a bet" on virtual prototyping as a winning technology for early software development, but noted that it's not close enough to the hardware to do system validation. "What is that [system validation] technology? Our bet is FPGA prototyping."

But there's a "gap" if one goes directly from a virtual prototype to an FPGA-based prototype, Tice said. An FPGA-based prototype, he said, has a very long cycle time, potentially taking weeks or months. "You need an accurate platform with a fast turn time," he said. "That's where emulation really shines. You can do multiple turns a day and you can turn hardware and software and merge them together." What's needed, he said, is a common environment between virtual prototyping, RTL emulation, and hardware prototyping.

Near the end of the panel, Camilleri suggested that there's a "good news part" to the discussion. Platforms for hardware/software co-development and integration are available, and as a result, Qualcomm is able to do performance testing it could not have done some years ago. "What's missing is the methodology of the platforms themselves," he said. Stitching platforms together in an efficient, seamless manner "is a problem to be resolved. To me it's more important than a more powerful emulator."

Richard Goering




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