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Webinar: Solar Power Management Chip Challenges Mixed-Signal Tools

Comments(0)Filed under: Industry Insights, Virtuoso, Analog, Mixed-Signal, mixed signal, Analog Simulation, webinar, power management, photovoltaic, MPPT-lite, MPPT, solar, solar power, solar cells, Triune

Real-world examples of mixed-signal design and verification are always interesting, especially when the end product may have a significant impact on society. That's the case with Triune Systems, a fabless semiconductor provider that has developed a chip that can maximize the power output of a photovoltaic (PV) cell. A recently archived Cadence Silicon Realization webinar discusses challenges behind the design and shows how it was implemented and verified.

In the webinar Wayne Chen, vice president and technology of Triune Systems, noted that his company has to deliver complex, manufacturable systems in a short time period. Triune is, indeed, doing some cutting-edge work. The company focuses on product innovation in such areas as energy harvesting and ultra low-power analog. Their maximum power point transfer (MPPT) "lite" technology promises to solar power systems more cost-effective and accessible.

Challenge: Wide Range of Tolerance

The chips Triune builds have a variety of real-world inputs. One resulting challenge is the wide range of input tolerances. For example, temperature changes occur on the order of seconds, while electrical time constants are in nanoseconds. Electrical constraints could range from amps (for motor control) to picoamps. Finding a simulator that can handle that kind of range is a challenge.

Chen described an MPPT-lite chip that maximizes the power output from a PV cell, which can then be stored in a battery or used to power an electronic load. Applications include portable solar chargers, off-grid systems, and cell phones. To do the design, Triune started with high-level modeling of analog and digital circuitry using Verilog-A and Verilog. Both batteries and PV cells are temperature-sensitive, so thermal constraints were an important part of this modeling.

Chen described how Triune engineers worked through system and test issues, used the Cadence Spectre and Virtuoso-AMS simulation environments, looked at parasitic capacitance and resistance in interconnects, and ran Monte Carlo analysis to ensure that the design was optimized for the process.

John Pierce, product marketing director at Cadence, then described in more detail the Cadence model validation flow, the use of real number modeling and wreal data type models in chip-level simulation, and the capabilities Cadence offers for digitally-assisted analog design.

A personal note: Having recently installed solar panels on my roof, I'm interested in Triune's technology, and pleased that Cadence mixed-signal design and verification tools are helping to make it possible. The archived webinar is available here to Cadence Community members (quick and free registration if you're not).

Richard Goering


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