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Q&A: IC Manage Founder Discusses IC Design Data Management

Comments(0)Filed under: Industry Insights, Virtuoso, data, Perforce, design data, Sikand, IC Manage, data management, GDP

When engineers get frustrated, great things can happen. Cadence Connections partner IC Manage came to life because its founder, Shiv Sikand, was looking for a better way to handle IC design data management. He wrote an open-source utility and then turned his expertise to launching IC Manage, where he now serves as vice president of engineering.

In this interview Sikand talks about his company, its Global Design Platform (GDP) product, the need for specialized IC design data management tools, the challenges of globally-distributed design teams, and GDP's tight integration with the Cadence Virtuoso platform. A new IC Manage whitepaper discusses the Virtuoso integration further.

Q: IC Manage was launched after you developed the cdsp4 utility for linking the Perforce database management tool to the Cadence Design Framework II (DFII). How did that come about?

A: When I was working at Silicon Graphics, we had very large teams building big microprocessors. None of the data management systems we had in house could scale to handle the data sizes and the concurrent user access we needed. We had almost every data management system in house or under evaluation, and none were able to meet our needs for performance and stability.

I was tasked with finding a solution for the CPU physical design team. In 1996 I discovered an early version of Perforce. It worked incredibly well, and I wrote cdsp4 along with some colleagues to bring data management to Cadence DFII. It [cdsp4] was eventually offered as open source under a BSD license.

Fast forward a few years, and Perforce Software has sold over 500,000 seats worldwide. And IC Manage is the exclusive Perforce OEM for hardware design, with 50-plus customers and many thousands of seats in production use.

Q: What is your primary offering today and what are its capabilities?

A: Our product is called GDP for Global Design Platform. Based on our previous experience, we knew that solving the problems of performance, scalability, and capacity in the underlying database was only part of the overall picture. So in addition to revision control, we offer release configuration management, distributed design and content delivery, bug traceability, design assembly, and derivative and IP management.

The hardest problems in this space are creating effective workflows for dealing with large sets of data, as well as handoffs for different types of engineers who are managing design and verification complexity. We are also working on long-haul networks and IP integration issues.

Q: There are a lot of general-purpose tools for data management. Why is there a need for a specialized tool for IC design?

A: IC design is all about workflow and best practices, as well as EDA tool integration. The underlying archive can be the same as in a general-purpose software environment, but the data model and the use model for IC design is very different. We're not dealing with software engineers writing code; we're dealing with PDKs, external and internal IP, simulation, RTL, analog/mixed-signal. There are a lot of very different disciplines involving engineers with highly specialized skills who need a common way of working together.

Q: Aren't there open-source Unix utilities that offer data management features? Why not use one of these?

A: There are several utilities that let you do basic archiving. If you want to do anything more, you have to write your own workflow model. Architecting such a system is very specialized, and the risk of getting it wrong is high. Aside from the risk, the cost of developing and maintaining such a system can be quite high.

Q: IP reuse and integration is an important part of the EDA360 vision. How does IC Manage support IP/SoC integration?

A: To reuse IP you need to be able to find it, and once you have found it, you need to understand it. What are its electrical, physical, and verification properties? You need to know before you make an informed decision about its capability for reuse.

GDP not only makes it easy to locate IP for reuse, but also to trace verification issues and track designer intent. The user of a particular IP block can look beyond the traditional "tarball" type black-box model, can draw back the curtains, and can get detailed information without having to read large stacks of PDFs or spreadsheets.

Q: There are a lot of globally distributed projects these days, with teams in locations like China and India. How does GDP help?

A: With China and India, teams are often very far away from central operations in the U.S. or Europe. GDP supports streaming with TCP and SCTP protocols to reduce the impact of long latency networks. GDP optimizes your available bandwidth by having streaming protocols, and also by eliminating the synchronization boundaries introduced by traditional replication-based solutions. Designers around the globe can have first-class LAN connections for local work and then share it globally, rather than being slaves to a long wire.

Q: There's a lot of emphasis these days on embedded software development for SoCs and systems. Can GDP support software development and hardware/software integration?

A: Since GDP is a vertical integration of the Perforce system, it is actually a very natural fit for software developers. There is a very rich software ecosystem around Perforce. The ecosystem includes build tools, collaboration tools, defect tracking, and IDE [integrated development environment] integration. Hardware and software designers can operate using the same database.

Q: How does GDP work with Virtuoso?

A: GDP supports both DFII and OpenAccess, and we provide a very rich client application within Virtuoso. It's implemented as a replacement library manager. That provides a very data management oriented solution for designers interacting with Silicon Realization tools.

Q: How does GDP fit into the EDA360 vision?

A: We provide EDA360-like capabilities by enabling the exchange of information between design layers. We also have unique support for inheritance relationships, but information is not lost when derivatives are created, as they normally are when you copy objects. We provide a common platform for storing or sharing critical design metadata, constraint information, and electrical and physical characteristics. These properties and metadata can be accessed by different utilities all along the tool chain, from specification to realization.

The metadata is stored in a tool-agnostic format and carried along with the data files. It's really all about information sharing along the entire scope of EDA360, and doing it in a seamless way so tools have easy access to information that is otherwise buried in engineers' brains or stored in spreadsheets or tool-specific formats.

Richard Goering

IC Manage Whitepapers

Using IC Manage GDP for Collaborative Custom IC (Virtuoso) and Digital SOC Design
Unifying Bug Tracking with Design Data Management Whitepaper
IC Design Data Management Best Practices Whitepaper


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