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User Interview: Design-Specific OCV – A Step Towards Statistical Timing

Comments(0)Filed under: Industry Insights, Statistical Timing, SSTA, CDNLive!, Renesas, timing, OCV, statistical, CDNlive, Komoda, DS-OCV, static timing, STA

Static statistical timing analysis (SSTA) can provide good timing accuracy by reporting statistical distributions instead of absolute numbers. But many design teams feel it's too early to deploy full SSTA. An alternative method available with the Encounter Digital Implementation System, called Design-Specific On-Chip Variation (DS-OCV), provides many of the advantages of SSTA in a simpler flow. At the recent CDNLive! Silicon Valley, Michio Komoda, senior engineer at Renesas, described his company's use of this methodology.

You can listen to the presentation and download the PDF from the CDNLive! On-Demand web site (see presentation titled Less Pessimism by Applying Design-Specific OCV Analysis in the Silicon Realization III session.  Access requires a free Cadence.com account). The following Q&A interview with Komoda-san was conducted following the presentation.

Q: What are the problems with traditional static timing analysis (STA)?

A: There are two major problems. First, Spice model corners cannot be defined as variations, so some pessimism is introduced. Secondly, OCV is pessimistic. With OCV it is difficult to define a single value, because it is sensitive to circuit structure. The pessimistic value is the most applicable.

STA gives you the simple sum of every result, while there is no correlation between the corner and OCV in actuality.

Q: Does STA require a large number of corners?

A: If we define many corners, the STA run times are huge. Another strategy is that we use 3 or 4 selected corners and apply some guardbands. That also introduces pessimism into STA.

Q: How far off are the STA measurements, and what are the consequences?

A: It depends on the circuit, but it seems to be 10 to 20 percent. This is safe from the standpoint of yield, but if we need to speed up timing, it makes for a long design time. Getting the final 100 picoseconds may take more than one week. Also, even if we fix the timing, we may need to introduce low Vt cells that are high leakage.

Q: What are the advantages of SSTA?

A: Accurate timing! SSTA also provides a 10 to 20 percent acceleration from STA turnaround time. Design time is reduced, and the leakage is reduced by around 20 percent.

Q: What are the advantages of DS-OCV?

A: We can use a statistical result. OCV is still set to a single value, but it is based on SSTA results. It is a more aggressive approach than normal OCV using a worst-case corner.

Q: Do you run DS-OCV on all nets, or just a few critical nets?

A: Critical nets. With 1,000 nets maybe we run on 1 or 2 percent of all nets

Q: Why not use full SSTA?

A: We still have some concerns about SSTA. One concern is slower run time. Also, a statistical library is required for all cells, and this is not practical. The library size becomes huge, and this is not good for management. Another issue is how to fix timing violations. Today there is no way to do timing-driven layout based on SSTA.

In the future, we plan to adopt SSTA. But SSTA cannot be deployed immediately. We need to develop an SSTA design flow.

Q: How will full SSTA compare to DS-OCV?

A: Leakage reduction is the most important issue. With full SSTA we will get more leakage reduction.

Q: What needs to happen for full SSTA adoption?

A: We need automated timing-driven layout and fixing by SSTA. That is the key issue for SSTA signoff, especially for leakage reduction.

Richard Goering

Related Blog Post

OCV Webinar: Statistical Timing Finds Its Niche



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