By allowing software development long before silicon is available, virtual platforms (also known as "virtual prototypes" or simply "simulation") are playing an increasingly important role in electronic system development. But they're just an initial step in the next generation of solutions that's needed for embedded software development. The next step, says Simon Davidmann, CEO of Imperas, will integrate virtual platforms with advanced verification techniques.
Imperas is a member of the Cadence System Realization Alliance, and Davidmann spoke at a Sept. 22 webinar in the ongoing System Realization webinar series. He talked about the advantages of virtual platforms, showed that they can run faster than real time, and discussed the Open Virtual Platforms (OVP) technology developed by Imperas. But it wasn't just a "virtual platforms are wonderful" talk. Instead, Davidmann said more than once that "simulation is necessary but it's not sufficient."
Yes, virtual platforms can run even faster than hardware prototypes, and they hook up to standard software debuggers. Yes, OVP provides open-source processor and peripheral models and a reference simulator that's free for non-commercial use. But "simulation" is really an infrastructure upon which to build new, advanced tools for verification and analysis, Davidmann said.
Four Steps to Embedded Enlightenment
Davidmann said that virtual platform simulation is the first of "four stages of awareness" for embedded software development:
- Simulation (virtual platforms)
- Advanced verification solutions for software development
- Better ways of managing and delivering huge amounts of software
- A new programming paradigm and tools to address parallel programming on multi-core platforms (the "Holy Grail")
Now, Davidmann said, Imperas is focusing on phase two. The company is developing its own tools for software verification, analysis, and profiling. What Davidmann talked mostly about, however, is a collaboration between Imperas and Cadence that is bringing advanced verification technologies such as metric-driven verification into the virtual platform environment.
Verification + Virtual Platforms = Empowerment
The integration between Cadence Incisive verification tools and Imperas virtual platform technology involves several stages. Capabilities include the following:
- All OVP components can run in the Cadence Incisive SystemC simulation environment. Developers can thus use Incisive as they're building the virtual platform.
- Incisive Software Extensions hooks into the platform and the OS, making it possible to control software as it's running on the virtual platform. You can, for instance, use a testbench to control a driver that's reading and writing values to a peripheral, and then monitor what's happening in the peripheral with scoreboarding and checking.
- Incisive Software Extensions also brings coverage-driven verification into the embedded software environment. You can run functional coverage to discover how well you exercised the driver in the context of the OS.
"For the first time, what we have here is technology that allows you to validate and test software drivers in the context of the OS and the device," Davidmann said. "Because of the capabilities of the virtual platform, you can run the full OS in real time."
When it comes to System Realization and virtual platforms, it's not enough to simply offer point tools. Deep collaboration is needed to produce the integrated software/hardware design flow that will be needed for tomorrow's electronic products.
This and other webinars in the System Realization series will be archived approximately one week after presentation.