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GTC Conference: GLOBALFOUNDRIES Charts Unique Path to 28nm

Comments(0)Filed under: Analog, mixed signal, Global Foundries, HKMG, Mixed-Signal Design Summit, Industry Insights: ARM, GlobalFoundries, DRC+, 28nm, gate-first, GTC, gate first

The first-ever Global Technology Conference (GTC), held by GLOBALFOUNDRIES Sept. 1 in Silicon Valley, made it clear that the company is aggressively going after the advanced-node foundry business and is moving ahead quickly on 28nm and below. GLOBALFOUNDRIES claims three distinctive capabilities in its move to 28nm:

  • A "gate first" high-k metal gate (HKMG) technology promising power, performance, and area advantages.
  • A new design for manufacturability (DFM) technology called DRC+, developed in cooperation with Cadence and Mentor Graphics.
  • An analog/mixed-signal design flow development kit, delivered in partnership with Cadence.

GLOBALFOUNDRIES has been moving quickly since its founding in 2009. Its global reach encompasses the former AMD fab in Dresden, Germany; the former Chartered Semiconductor fabs in Singapore; and a new fab under construction in upstate New York. That fab will be aimed at 28nm and below and will install extreme ultraviolet (EUV) equipment, with an expected EUV production date of 2014-2015.

GLOBALFOUNDRIES is currently in early production of its 32nm HKMG technology, with volume ramp-up in late 2010-2011. The 28nm process uses the same "gate first" metal stack, and will go into "risk production" in Q4 2010. Doug Grose, GLOBALFOUNDRIES CEO, said the company expects multiple 28nm tapeouts by the end of this year. One that's been announced is a dual-core, Cortex-A9 based test chip built in collaboration with ARM.

I noticed that 28nm was mentioned far more often than 32nm at GTC. It seems that the company is placing considerably more emphasis on the 28nm node. "We believe that 28nm is going to be an inflection point for the industry and is potentially a technology node that will change the landscape of the foundry industry," said Chia Song Hwee, GLOBALFOUNDRIES COO.


HKMG is not a new or unique technology - it's expected to be widely used at 32/28nm due to its power and performance advantages. What's different at GLOBALFOUNDRIES is its "gate first" process technology, which contrasts to the "gate last" method that's more typically used to build high-k metal gates. According to GLOBALFOUNDRIES, the gate-first approach re-enables transistor gate length scaling that stopped at 90nm because of the inability to scale silicon oxynitride (SiON) thickness.

Gregg Bartlett, senior vice president for technology and R&D at GLOBALFOUNDRIES, said that the gate-first approach offers comparable or superior performance to the gate-last approach, and that gate-first provides 10-20% smaller die size. Relative to 40nm, he said, 28nm gate-first HKMG offers a 2X density increase, over 30% performance improvement, over 40% active power reduction, and 50% leakage power reduction.

GLOBALFOUNDRIES offers a 28nm SLP library for low power, cost sensitive applications; a 28nm HP library optimized for multi-core high performance; and a new 28nm HPP library that promises a 10% performance improvement over HP.

Rethinking DFM with DRC+

GLOBALFOUNDRIES claims an industry first with DRC+, which represents a new approach to design-rule checking and DFM. Aimed at 28nm and below, it's based on 2D pattern matching. According to Luigi Capodieci, R&D fellow at GLOBALFOUNDRIES, the company first pre-characterizes all shapes present in the layout. It then uses pattern matching to identify shapes that might cause lithography hot spots. DRC+ thus creates a library of "yield detractors."

The claim is that DRC+ is as accurate as a full-blown lithography process simulation, while running as fast as a DRC engine. I plan to revisit DRC+ in more depth in future postings.

Analog/Mixed Signal at 28nm

The same day as GTC, GLOBALFOUNDRIES claimed another industry first with its 28nm Analog/Mixed-Signal production design flow development kit. Developed in partnership with Cadence, the flow includes PCells that enable functionality in the Cadence Virtuoso design tools. The complete production-level flow is planned for release in Q4 2010, with silicon validation scheduled for early 2011. The reference flow includes parasitic extraction, rapid layout prototyping, analog layout guidelines, EM/IR analysis, and circuit simulation, and it works with DRC+ and HKMG.

Why is this significant? "We've done a lot of work in the past with Cadence and Synopsys on digital flows for 28nm," said Jim Ballingall, vice president of marketing at GLOBALFOUNDRIES. "This is a first in the industry for an analog/mixed-signal flow. It's an important feature because our customers have SoC designs that require analog, digital and RF."

In the short video interview below, Ballingall offers additional commentary on the gate-first HKMG technology, DRC+, and the analog/mixed-signal flow, in addition to GTC itself. He also comments on the importance of collaboration and describes GLOBALSOLUTIONS, a new ecosystem partner program of which Cadence is a member.


If video fails to open, click here

Hardly skipping a beat, GLOBALFOUNDRIES is moving right on to the 22/20nm process nodes, with risk production expected in 2H 2012. It looks like the advanced node foundry industry is going to be competitive, innovative, and interesting to watch.

Richard Goering



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