Open-Silicon is a
fabless SoC and ASIC design company that provides a complete "spec to silicon"
development capability. As such, folks at Open-Silicon are well aware of the
challenges posed by SoC design and silicon IP integration - they face those
challenges every day.
In the following video interview Naveed Sherwani,
Open-Silicon CEO, discusses his company's unique business model, talks about
challenges in IP integration and SoC verification, and comments on statements
in the EDA360 vision paper about
the need for tools for integrators and for integration-optimized IP. The
interview was done at the recent Design Automation Conference, where
Open-Silicon, a Cadence customer and partner, was among the presenters at the
If video fails to open, click here.
Not included here are some comments Sherwani made about
addressing derivative SoC designs. He explained that Open-Silicon can take an
existing chip and make modifications, starting with the existing chip and a
change document from the customer. Open-Silicon then does the micro-architecture,
the verification, and sometimes even the software as part of a complete
In the video clip, Sherwani comments that IP must be
verified in the context of the SoC and the applications it will run. I think
this is a very important point. The IP doesn't work until the system works, and
the system doesn't work until the software runs on it as expected.
This concept clearly expands the scope of verification. But
it also opens the door to reduced costs, faster time to market, and better
quality. If you take an application-driven perspective, as proposed by EDA360, there's
no other way to go.