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NVidia Engineer Cites HW/SW Integration Challenges

Comments(0)Filed under: Industry Insights, Palladium, Simulation, nVidia, HW/SW Integration, EDA360, acceleration, emulation, Konda

One of the biggest challenges facing NVidia is the verification of software applications in the context of overall system designs, according to Narendra Konda, director of hardware engineering at NVidia. Konda was a speaker at the Cadence EDA360 introductory event at the San Jose Tech Museum April 27, and he spoke about his company's experience with the Palladium XP verification computing platform, introduced April 26.

Cadence is positioning the Palladium XP, which integrates emulation, acceleration, and simulation, as a step towards the System Realization aspect of EDA360, which seeks to enable integrated hardware/software platforms ready for applications deployment. That's what semiconductor companies such as NVidia are now expected to provide. To do so, it is very helpful to test applications in a real-world environment before silicon is available. This requires both accuracy and speed.

 

Narendra Konda spoke at an EDA360 introductory event for press, partners and customers.

Konda left no doubt about the importance of software applications at NVidia. He noted that the company has multiple software teams developing a wide range of applications for its GPUs, and not just graphics applications, but compute-related tasks as well. Many different operating systems must be supported - Windows, Linux, Apple, and others. NVidia wants to make sure applications will work before silicon is finalized.

"Before silicon comes back from the fab, I want to be able to run all my applications, all my games, all my workloads, and make sure they are 100 percent working at the system level," Konda said. "Once I can run all my applications, I can be comfortable the system is ready to go." This means NVidia needs to bring its largest GPUs into the verification environment. That's pretty big. NVidia GPUs, Konda said, have up to 3 billion transistors and 512 processor cores, providing the compute power of a "supercomputer" a decade ago.

Konda identified three system integration steps. One is to design and verify the silicon itself. Another is to plug the silicon into a representation of the overall system (such as a PC) and verify that the GPU works at a system level. A third is to run lots of software applications on the virtualized platform.

With pure simulation, Konda noted, running a single application could take days or weeks. That's unacceptable. "We cannot be productive, or get a chip out on time, if one simulation takes a week to ten days. We want to run at several megahertz, but simulation runs at kilohertz." (Palladium XP emulation runs at 2-4 MHz).

Low power design is another concern. "I want to run power analysis and get feedback really fast," Konda said. "Once I analyze what kind of power the device is consuming, I can make architectural decisions or redesign the chip to reduce power."

Palladium XP, Konda said, "brings together software people, hardware people, and marketing people." Marketing people? Yes, he said, marketing people can leverage a hardware model to run rapid what-if scenarios and decide what capabilities they really want a new chip to provide, based on the results.

At the end of the day, System Realization is about company culture as well as new tools and methodologies. "Unless people start talking to each other, it's really hard to do the integration," Konda said. "I think [Palladium XP] is one place where all the teams interact in real time."

Richard Goering

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