Bringing MEMS Design To The Mainstream

• MEMS design typically requires PhD-level experts in areas such as mechanical, optical, fluidic, and package design.
• MEMS historically requires specialized process development for each design, and is mostly confined to IDMs who have their own fabs.
• Even though most MEMS devices reside within electronic systems, the MEMS design flow has been totally separate from the EDA environment.

As a result, bringing a MEMS product to market today can cost $40 million, and take 4-10 years of development time. Multi-disciplinary teams of experts are required. The biggest growth area for MEMS is in high-volume consumer applications, and long, expensive development cycles won't cut it there.

What's needed is a way to bring MEMS out of the realm of experts working for IDMs, and into the IC design mainstream. Mike Jamiolkowski, CEO of MEMS tool provider Coventor, calls this process the "democratization of MEMS." This will result in a shift from traditional MEMS companies to semiconductor foundries and fabless design houses, and will make MEMS ubiquitous in everyday life, he says.

The democratization of MEMS calls for a more standardized design flow. What's needed is a "Mead Conway equivalent" for MEMS, as Randy Fish, product marketing director at Cadence, puts it. An important part of that flow is the ability to simulate a MEMS device along with the electronic circuitry in the overall system. "MEMS typically don't stand alone," Mike said. "MEMS and electronics interact strongly, and the designs need to be simulated together."

Also important is an ability to import a MEMS device into a schematic, and ultimately into a physical layout, of the entire system. Unfortunately, MEMS designers use 3D CAD/CAE tools while electronics designers work with EDA tools such as the Cadence Virtuoso platform. The handoff from MEMS designers to IC or package designers is mostly manual, requiring the expert handcrafting of MEMS models for the EDA environment.

Coventor's recently-released MEMS+ product takes a different approach. After assembling a 3D design, users can generate a schematic symbol for the Cadence Virtuoso environment, a netlist for the Cadence Spectre or Ultrasim simulators, and a PCell for Cadence Virtuoso layout. The MEMS device can be inserted into the schematic and simulated along with the electronic circuitry. The MEMS designer can view the simulation results in the Coventor 3D environment.

As a result, Mike said, "the handoff to the IC engineer is very simple, very clean." He said Coventor is selling MEMS+ to IC design teams as well as MEMS designers, opening up a new marketplace for MEMS design. Some expertise is still required to build the 3D MEMS device, but the barrier to entry is a lot lower than with traditional MEMS CAD systems, Mike said. An article on the Design Automation Conference (DAC) web site, co-authored by Coventor and Cadence, provides further perspectives about the connection of MEMS development to the IC design environment.

The next challenge is developing standard foundry processes for MEMS. There is some progress. According to Mike, many IDMs have figured out how to develop MEMS processes that can handle derivative designs, as opposed to the traditional "one design, one process" approach. There are also a number of specialized MEMS foundries.

Pure-play foundries are beginning to show interest. In 2008 TSMC announced it would upgrade a portion of its 0.35 micron logic process capacity to MEMS. In October 2009, Cypress spinoff SVTC and TSMC announced a joint development effort aimed at MEMS commercialization. What is ultimately needed is a foundry infrastructure including process development kits (PDKs), IP, and reference flows.

With the right tooling and with foundry support, we may be standing at the threshold of a tiny revolution.

Richard Goering