in the most optimistic of discussions, there is an "elephant in the room" that
people don't say much about. Such was the case at the DVCon SystemC Day
Feb. 22, where despite strong attendance and upbeat presentations, there was
only a small amount of discussion about the need for third-party transaction
level modeling (TLM) IP.
of SystemC Day I attended was a North American SystemC Users Group (NASCUG) meeting. It
started out with an Open SystemC Initiative (OSCI)
update by OSCI chair Eric Lish and a keynote by industry analyst Gary Smith. In
addition to several technical presentations about SystemC modeling, it included
a talk by Brian Bailey on TLM design and verification, which I blogged
only discussion of commercial TLM IP came in question-and-answer sessions. Gary
Smith noted that an International Technology Roadmap for Semiconductors (ITRS) working group found that IP
blocks with over a million gates are unusable by most customers. Integrators
need "modifiable" blocks they can assemble and integrate quickly, without
losing too much of the original verification environment. "You can't develop
that kind of block at the RT [register transfer] level," Gary said.
Good turnout, strong technical
sessions at SystemC Day NASCUG meeting - but what about IP models?
difference between RTL modeling and transaction level modeling is that you can
make money at the transaction level," Gary
said. "We have to get IP providers to move up to the transaction level." He
noted that large customers pulled their IP development in house when large
blocks came out, and suggested that it may be because they can't get modifiable
IP at the RT level.
immediately reminded of a recent blog by
Dan Nenni that stated that only about 30 percent of the IP that can be
outsourced is outsourced. Could the lack of commercially available TLM IP be a
is a new company launched by Jack Donovan, former president of XtremeEDA, to
provide hardware and software IP for use with high-level synthesis. "What's the
business model for selling IP at a high level? I'm not sure what it is yet," he
said in a response to a question after his NASCUG presentation on managing code
complexity. He noted that there will have to be a "high degree of assurance"
that TLM models and RTL models operate in the same way.
presentation showed that some TLM modeling is occuring. Herve Alexanian of Sonics described an Open Core Protocol (OCP)
modeling kit from the OCP-IP organization
that supports various levels of TLM abstraction, ranging from TL0 (RTL) to TL4
(loosely timed transaction level), based on the OSCI SystemC TLM-2.0
specification. In another presentation, David Black of XtremeEDA offered some practical
suggestions for developing TLM models without clocks.
As the Brian
Bailey presentation showed, good progress is being made towards a
TLM-driven design and verification flow that can greatly boost productivity and
time-to-market. Tools such as the Cadence C-to-Silicon
Compiler are enabling that flow. And as noted in a SystemC Day tutorial,
work is ongoing on a standard SystemC synthesizable subset.
Now we need
commercial IP providers to come on board with SystemC TLM models. Will they
hear the call?