Mode Support for SimVision “Stop Simulation” Button
By Team Specman
on May 8, 2013
Prior to Incisive Enterprise Simulator (IES) 12.1, clicking the SimVision "Stop Simulation" button would stop the simulation both in an HDL context and in a Specman context if Specman was present in the simulation. To provide better flexibility...
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Filed under: AF, debug, e language, Functional Verification, IES, Incisive, SimVision, Specman, stop simulation, stop Specman
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Develop For Debugability – Part II
By Team Specman
on April 23, 2013
Looking at Coding Styles for Debug In this blog post we are going to discuss 3 different cases where coding style can help you debug easier: 1. Declarative vs. Sequential Coding 2. Method Call Depth 3. Calculating if-else Conditions Declarative vs. Sequential...
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Filed under: AF, Daniel Bayer, debug, debugability, debuggability, e language, Functional Verification, Incisive Enterprise Simulator (IES), Specman, Specman/e
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Develop for Debugability – Part 1
By Team Specman
on April 8, 2013
Debugging is the most time-critical activity of any verification engineer. Finding a bug is very often a combination of having a good hunch, experience, and the quality of testbench code that you need to analyze. Since having a good hunch and experience...
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Filed under: AF, aspect-oriented programming, Daniel Bayer, debug, debugability, debugging, e language, encapsulate, encapsulating aspects, Functional Verification, Incisive Enterprise Simulator (IES), simulation, Specman, verification
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Incisive Debug Analyzer is a Finalist for EETimes and EDN ACE Software Product of the Year
By Kishore Karnane
on March 25, 2013
Great news.... Incisive Debug Analyzer (IDA) is one of five finalists for the EETimes/EDN Annual Creativity in Electronics (ACE) Awards in the Software Product of the Year category. In addition to IDA, Lip-Bu Tan and Cadence are also finalists for ACE...
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Filed under: ACE, Cadence, debug, e, EDA, EE Times, IDA: Functional Verification, Incisive, Incisive Debug Analyzer, Incisive Enterprise Simulator, Incisive Enterprise Simulator (IES), IUS, simulation, Specman, Specman e, Specman/e, SystemVerilog
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Specman: Getting Source Information on Macros
By Team Specman
on March 12, 2013
When you write a define-as or define-as-computed e macro, you sometimes need the replacement code to contain or to depend on the source information regarding the specific macro call, including the source module and the source line number. For example...
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Filed under: AF, e language, Functional Verification, macros, messages, source information on macros, Specman, team specman
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Launch Time – Udacity CS348 Functional Hardware Verification Hits the Web Today, March 12, 2013
By Axel Scherer
on March 12, 2013
Udacity/Cadence MOOCs CS 348 course on Functional Hardware Verification will go live on Mar 12, 2013....
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Filed under: Axel Scherer, Cadence, CS348, e language, Functional Verification, hardware verification, IEEE 1647, Incisive, MOOC, on-line class, on-line course, Scherer, Specman, Udacity, verification, verification course
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DVCon 2013: Functional Verification Is EDA’s “Killer App”
By Joseph Hupcey III
on March 10, 2013
With another year of record attendance, DVCon has again proven that a functional verification-focused mix of trade show and technical conference is what customers need to get their jobs done. Here are some of the some of the highlights I took away from...
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Filed under: apps, DVcon, DVCon 2013, e, e code, e language, formal, Formal Analysis, formal apps, Functional Verification, Joe Hupcey III, methodology, metric driven verification (MDV), metrics, papers, Richard Goering, Specman, Specman e, Team Verify, UVM e, verification
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JBYOB (Just Bring Your Own Browser): Interactive Labs on Udacity CS348 Functional Hardware Verification – No Installation Required
By Axel Scherer
on March 5, 2013
Interactive coding in the web browser. Preview of the interactive features of Udacity CS348 Functional Hardware Verification course....
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Filed under: Course, CS348, Functional Verification, IEEE 1647, interactive labs, MOOC, on-line, online course, Scherer, Udacity
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Planning to Go to DVCon 2013 Next Week? If So, Don't Miss the Debug Tutorial Feb. 28th!
By Kishore Karnane
on February 20, 2013
TUTORIAL : Fast Track Your UVM Debug Productivity with Simulation and Acceleration Session: 5T on Thursday, Feb. 28 th from 8:30AM - 12:00PM For more details on the debug tutorial, click here This debug tutorial will highlight how customers can reduce...
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Filed under: Aspect Oriented Programming, AVS, debug, Debug Performance, debug tutorial, DVcon, Functional Verification, IES, IES-XL, Incisive Debug Analyzer, Incisive Enterprise Simulator (IES), metric driven verification (MDV), Mixed Signal Verification, Specman/e, SystemVerilog
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