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Advanced Profiling for SystemVerilog, UVM, RTL, GLS, and More

Comments(0)Filed under: SystemVerilog, verification, Incisive, uvm, profiling, post-simulation profiling

The profiler helps to figure out the components or the code streams that take the maximum time or memory during simulation. Over the years, profiling was more inclined toward RTL and GLS than verification. Today, with the increase in number of performance bottlenecks found in SystemVerilog, UVM, and general verification environments, profiling requirements have changed for the design and verification environment. The list of critical information that is not provided by most traditional profilers today includes:

  • Flat function name associated with CPU/memory, no instance-/object-based association
  • No call graph
  • No abstract level association with standard methodologies like UVM (UVM phases)
  • No dynamic data type information for memory

The Incisive advance profiler (IPROF) addresses most of these and can be used for detailed analysis of performance for all kinds of design and verification environments, including mixed language verification environments. The key features are:

  • The GUI-based utility for post-simulation profile analysis
  • Instance-based association of HDL instances and class objects
    • Helps to narrow down the scope of the problem
  • Provide call-graph information
    • Information about functions which have called a bottleneck function (or functions which are called by a bottleneck function) provides complete context and helps in debug and optimization
  • Associate memory information with dynamic data types
    • Report the consumption of the memory in user processes and dynamic data types in a hierarchical manner. Track the memory allocation and de-allocation of every user process and dynamic data types.

Below are some videos detailing key IPROF features.

1. Introduction to IPROF

This video introduces IPROF, providing a demo that shows the basic features of the profiler and the approach to figure out the performance bottlenecks in any design and verification environment. A simple Verilog design and verification environment is used to demonstrate the profiler features. One of the key feature covered in this demonstration is the instance-based profiling. This is a key differentiator to the traditional profiling where profiling was only module- or type-based. The demonstration also highlights the categories view, which shows category-wise breakup of the time in different domains like:

  • HDL block
  • Assertion
  • Randomization
  • Callgraph

 View the video here: http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:VideoViewer;src=wp;q=Video/Functional_Verification/vdn/iProf/iProf_Intro.htm

 

2. IPROF Callgraph Feature

This video demonstrates one of the key features of IPROF, the callgraph. A callgraph is a category which shows the time consumed in SystemVerilog class-based verification environment. The callgraph also shows the time taken in individual class methods along with the contribution of its callers and callees in the simulation. The demonstration describes how to traverse through the call chains in a complex class-based verification environment to figure out performance bottlenecks.

Watch the video here:

http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:VideoViewer;src=wp;q=Video/Functional_Verification/vdn/iProf/iProf_Callgraph.htm

 

3. IPROF with PLI, VPI, and DPI

This video demonstrates how to profile the simulator interfaces to third-party applications like PLI/VPI/DPI. One of the in-house third-party applications is used to demonstrate how to figure out the time spent in User C code, standard interface routines like vpi_get_value,vpi_put_value, and the third-party system tasks. The demonstration also explains how to figure out the instance under which the third-party application is called and the callers of the DPI calls in callgraph.

Watch the video here:

http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:VideoViewer;src=wp;q=Video/Functional_Verification/vdn/iProf/iProf_Sim_Interfaces.htm

 

4. Incisive Memory Profiler

This video is an introduction to the Incisive memory profiler. This demonstration explains how to use the memory profiler dashboard feature to perform first-level memory analysis. The first-level analysis is helpful to understand the memory consumption in four key areas:

  • Static memory
  • Memory consumed in user testbench
  • Dynamic libraries
  • Internal tool memory consumption

Watch the video here:

http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:VideoViewer;src=wp;q=Video/Functional_Verification/vdn/iProf/iProf_Memory.htm

Thanks,

Chinmay Banerjee

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