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Practical Guide to the UVM for $15 - Virginia, There is a Santa!

Comments(0)Filed under: Verification methodology , OVM, SoC, SystemVerilog, IES, Register Package, funtional verification, VMM, uvm, Incisive Enterprise Simulator, scoreboard, IUS, IEEE 1800, IEEE1800, UVMWorld, Register Layer

Wondering what to get the verification engineer on your list?  You know, the one with the zealous love of SystemVerilog and UVM? It's the Practical Guide to Adopting the UVM, Second Edition for only $15!

The Practival Guide to the UVM is the most popular source of knowledge for the UVM.  The second edition, available since the beginning of 2013, has sold over 3500 copies. Authored by Kathleen Meade and Sharon Rosenbeg, the book provides novice to expert knowledge on testbench methodology and how to apply UVM to solve verification problems.

To get your deeply discounted version, visit our self-publishing company, LuLu.com.  You can search for the book there or follow this direct link.

Once you get it, be sure to get the examples.  Kathleen posted them on the UVMWorld forums at Accellera.org.  The downloads are free!

So grab your copy while it's at this new low price.  Come mid-January, the price will pop back to $60.

Wow, this sound sooooo much like a late-night commercial.  :-)

 

Happy  Holidays,

Your Cadence UVM team 

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