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Improve Debug Productivity - SimVision Video Series on YouTube

Comments(0)Filed under: Functional Verification, Low Power, Coverage-Driven Verification, SystemVerilog, metric driven verification (MDV), IES, Incisive Enterprise Simulator (IES), IES-XL, sequences, Incisive, debug, SimVision, VHDL, Verilog, Mixed Signal Verification, IEV, IFV, EDA360, bug, Incisive Enterprise Simulator, RTL, : Functional Verification, UVM-MS, Cadence, video tutorial, Transaction, Debug Performance, RTL design, SimVision watch window, watch window, debugging

Most verification customers claim that they are spending over 50% of their verification effort in debug. If so, you should check out these latest SimVision debug videos since you will quickly see how SimVision can enable you to be much more productive in less than an hour after viewing the videos.

Take the time to browse through these videos.  Everyone will benefit, even if you are a new user looking for a debug solution or if you are an experienced SimVision user looking for new and enhanced debug functionality in our latest 12.2 release.

Cadence Debug Verification Expert, Corey Goss, has recently uploaded 13 SimVision videos on YouTube that you can view. The series focuses on a number of key debug features that support various debug flows (RTL, Testbench, SystemC/C/C++ Debug, etc.) and a common debug environment (HDL and Testbench).

You can view the entire playlist of Debug videos from the link below:


Let's Debug with SimVision

Kishore Karnane

Team Debug


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